Weitong Chuang

According to our database, Weitong Chuang authored at least 8 papers between 1992 and 2000.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2000

Power-delay optimizations in gate sizing.

Sachin S. Sapatnekar, Weitong Chuang

ACM Trans. Design Autom. Electr. Syst., 2000

1995

Timing and area optimization for standard-cell VLSI circuit design.

Weitong Chuang, Sachin S. Sapatnekar, Ibrahim N. Hajj

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

Power vs. delay in gate sizing: conflicting objectives?

Sachin S. Sapatnekar, Weitong Chuang

Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995

1994

Circuit-level dictionaries of CMOS bridging faults.

Terry Lee, Weitong Chuang, Ibrahim N. Hajj, W. Kent Fuchs

Proceedings of the 12th IEEE VLSI Test Symposium (VTS'94), 1994

Delay and area optimization for compact placement by gate resizing and relocation.

Weitong Chuang, Ibrahim N. Hajj

Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

1993

Fast Mixed-Mode Simulation for Accurate MOS Bridging Fault Detection.

Weitong Chuang, Ibrahim N. Hajj

Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

A unified algorithm for gate sizing and clock skew optimization to minimize sequential circuit area.

Weitong Chuang, Sachin S. Sapatnekar, Ibrahim N. Hajj

Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

1992

Estimating rotation speed from projections in SAR.

Weitong Chuang, Thomas S. Huang

Proceedings of the 1992 IEEE International Conference on Acoustics, 1992