Wen-Ho Juang

Orcid: 0000-0002-8220-8934

According to our database1, Wen-Ho Juang authored at least 14 papers between 2010 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Portable RDFT-Based EIS System Design With a Low-Complexity Impedance Calculation.
IEEE Trans. Instrum. Meas., 2023

Fast Measurement of Impedance Calculation for Electrochemical Impedance Spectroscopy.
Proceedings of the 20th International SoC Design Conference, 2023

Convolutional Neural Network-based Keyword Classification for Mixer Control.
Proceedings of the 20th International SoC Design Conference, 2023

A Cost-efficient Hardware Accelerator Design for 2D Sliding Discrete Fourier Transform.
Proceedings of the International Conference on Consumer Electronics - Taiwan, 2023

2022
Hardware Accelerator Design of DCT Algorithm With Unique-Group Cosine Coefficients for Mel-Scale Frequency Cepstral Coefficients.
IEEE Access, 2022

2021
Font-End Integrated Circuit Design for Plant Physiological Sensing.
Proceedings of the IEEE International Conference on Consumer Electronics-Taiwan, 2021

2019
A Non-Feedback-Loop and Low-Computation- Complexity Algorithm Design for a Novel 2-D Sliding DFT Computation.
IEEE Access, 2019

2018
VLSI Architecture for Novel Hopping Discrete Fourier Transform Computation.
IEEE Access, 2018

2016
Hybrid Architecture Design for Calculating Variable-Length Fourier Transform.
IEEE Trans. Circuits Syst. II Express Briefs, 2016

A Distortion Cancelation Technique With the Recursive DFT Method for Successive Approximation Analog-to-Digital Converters.
IEEE Trans. Circuits Syst. II Express Briefs, 2016

Low-cost prototype design of a portable ECG signal recorder.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016

2013
High-performance RDFT design for applications of digital radio mondiale.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2010
A Low-Cost, Low-Complexity, and Memory-Free Architecture of Novel Recursive DFT and IDFT Algorithms for DTMF Application.
IEEE Trans. Circuits Syst. II Express Briefs, 2010

Low-Computation-Cycle, Power-Efficient, and Reconfigurable Design of Recursive DFT for Portable Digital Radio Mondiale Receiver.
IEEE Trans. Circuits Syst. II Express Briefs, 2010


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