Wenbiao Zhou

According to our database1, Wenbiao Zhou authored at least 21 papers between 2006 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Channel and spatial attention-guided network for deep high dynamic range imaging with large motions.
Vis. Comput., March, 2024

2023
G2GT: Retrosynthesis Prediction with Graph-to-Graph Attention Neural Network and Self-Training.
J. Chem. Inf. Model., April, 2023

A dynamic range adjustable inverse tone mapping operator based on human visual system.
Vis. Comput., 2023

Lingo3DMol: Generation of a Pocket-based 3D Molecule using a Language Model.
CoRR, 2023

2022
Observing Noncovalent Interactions in Experimental Electron Density for Macromolecular Systems: A Novel Perspective for Protein-Ligand Interaction Research.
J. Chem. Inf. Model., 2022

G2GT: Retrosynthesis Prediction with Graph to Graph Attention Neural Network and Self-Training.
CoRR, 2022

2014
Comprehensive Performance Analysis of Two-Way Multi-Relay System with Amplify-and-Forward Relaying.
IEICE Trans. Commun., 2014

2013
Efficient sorting design on a novel embedded parallel computing architecture with unique memory access.
Comput. Electr. Eng., 2013

2012
Generator Flow: An XML Configurable Design Pattern Used in NoGAP.
Proceedings of the Ninth International Conference on Information Technology: New Generations, 2012

Automatic Synthesizable HDL Generator for NoGAP.
Proceedings of the 2012 IEEE/ACIS 11th International Conference on Computer and Information Science, Shanghai, China, May 30, 2012

2011
ePUMA embedded parallel DSP processor with Unique Memory Access.
Proceedings of the 8th International Conference on Information, 2011

2010
Tradeoff between Approximation Accuracy and Complexity for Range Analysis using Affine Arithmetic.
J. Signal Process. Syst., 2010

Automatic port and bus sizing in NoGap.
Proceedings of the 2010 International Conference on Embedded Computer Systems: Architectures, 2010

Operation Classification for Control Path Synthetization with NoGAP.
Proceedings of the Seventh International Conference on Information Technology: New Generations, 2010

Implementation of a Floating Point Adder and Subtracter in NoGAP, A Comparative Case Study.
Proceedings of the IEEE/IFIP 8th International Conference on Embedded and Ubiquitous Computing, 2010

NoGap<sup>CL</sup>: A flexible common language for processor hardware description.
Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010

2009
A Fast and Flexible Accuracy-guaranteed Fractional Bit-widths Optimization Approach.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Fast trade-off evaluation for digital signal processing systems during wordlength optimization.
Proceedings of the 2009 International Conference on Computer-Aided Design, 2009

Floating-point to Fixed-point Transformation Using Extreme Value Theory.
Proceedings of the 8th IEEE/ACIS International Conference on Computer and Information Science, 2009

2007
A Link-Load Balanced Low Energy Mapping and Routing for NoC.
Proceedings of the Embedded Software and Systems, [Third] International Conference, 2007

2006
Pareto based Multi-objective Mapping IP Cores onto NoC Architectures.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006


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