Wenhe Yin

Orcid: 0009-0001-0664-6035

According to our database¹, Wenhe Yin authored at least 3 papers between 2024 and 2025.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of four.

Timeline

Legend:

Book

In proceedings

Article

PhD thesis

Dataset

Other

Links

On csauthors.net:

Bibliography

2025

Corrections to "An Efficient Two-Stage Pipelined Compute-in-Memory Macro for Accelerating Transformer Feed-Forward Networks".

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., September, 2025

A 65nm 100MS/s-400MS/s Multi-Column SAR/SS ADC with Reconfigurable 2-8 Bit Resolution for Optical and In-memory Computing.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

2024

An Efficient Two-Stage Pipelined Compute-in-Memory Macro for Accelerating Transformer Feed-Forward Networks.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., October, 2024

Wenhe Yin

Timeline

Legend:

Links

On csauthors.net:

Bibliography

Loading...