William A. Lane

According to our database, William A. Lane authored at least 5 papers between 1985 and 1990.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

1990

Improved bipolar transistor performance in CMOS by novel use of parasitic collector resistance.

Denis J. F. Doyle, William A. Lane

IEEE J. Solid State Circuits, April, 1990

1989

Statistical design techniques for D/A converters.

Cormac S. G. Conroy, William A. Lane, Michael A. Moran

IEEE J. Solid State Circuits, August, 1989

Circuit modeling of bipolar transistors for BiCMOS.

Denis J. F. Doyle, William A. Lane

IEEE J. Solid State Circuits, February, 1989

1988

Comments, with reply, on 'Characterization and modeling of mismatch in MOS transistors for precision analog design'.

Cormac S. G. Conroy, William A. Lane, Michael A. Moran, Kadaba R. Lakshmikumar, Miles A. Copeland, Robert A. Hadaway

IEEE J. Solid State Circuits, February, 1988

1985

Extraction of MOSFET Parameters Using the Simplex Direct Search Optimization Method.

Patrick Conway, Ciaran G. Cahill, William A. Lane, Sverre U. Lidholm

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1985