Cormac S. G. Conroy

According to our database, Cormac S. G. Conroy authored at least 5 papers between 1988 and 2005.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2005

A four-channel 3.125-Gb/s/ch CMOS serial-link transceiver with a mixed-mode adaptive equalizer.

Jinwook Kim, Jeongsik Yang, Sangjin Byun, Hyunduk Jun, Jeongkyu Park, Cormac S. G. Conroy, Beomsup Kim

IEEE J. Solid State Circuits, 2005

2003

A low-power CMOS Bluetooth RF transceiver with a digital offset canceling DLL-based GFSK demodulator.

Sangjin Byun, Chan-Hong Park, Yongchul Song, Sung-Ho Wang, Cormac S. G. Conroy, Beomsup Kim

IEEE J. Solid State Circuits, 2003

1993

An 8-b 85-MS/s parallel pipeline A/D converter in 1- mu m CMOS.

Cormac S. G. Conroy, David W. Cline, Paul R. Gray

IEEE J. Solid State Circuits, April, 1993

1989

Statistical design techniques for D/A converters.

Cormac S. G. Conroy, William A. Lane, Michael A. Moran

IEEE J. Solid State Circuits, August, 1989

1988

Comments, with reply, on 'Characterization and modeling of mismatch in MOS transistors for precision analog design'.

Cormac S. G. Conroy, William A. Lane, Michael A. Moran, Kadaba R. Lakshmikumar, Miles A. Copeland, Robert A. Hadaway

IEEE J. Solid State Circuits, February, 1988