Wojciech Zajac

Orcid: 0000-0001-8681-8556

According to our database1, Wojciech Zajac authored at least 10 papers between 2002 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2023
NeRFlame: FLAME-based conditioning of NeRF for 3D face rendering.
CoRR, 2023

2022
Influence of Programmable Logic Controller Program Structure to Digital Inputs Reaction Time.
Proceedings of the Knowledge-Based and Intelligent Information & Engineering Systems: Proceedings of the 26th International Conference KES-2022, 2022

2021
IPNES - Interpreted Petri Net for Embedded Systems.
Proceedings of the Knowledge-Based and Intelligent Information & Engineering Systems: Proceedings of the 25th International Conference KES-2021, 2021

Implementation of an example of Hierarchical Petri Net (HPN) in LAD language in TIA Portal.
Proceedings of the Knowledge-Based and Intelligent Information & Engineering Systems: Proceedings of the 25th International Conference KES-2021, 2021

2020
On some aspects of Concurrent Control Processes Modelling and Implementation in LAD Diagram Language With Use of New Generation Engineering Software.
Proceedings of the Knowledge-Based and Intelligent Information & Engineering Systems: Proceedings of the 24th International Conference KES-2020, 2020

2019
Decreasing Number of LUTs for Moore FSMs.
Proceedings of the 26th International Conference on Mixed Design of Integrated Circuits and Systems, 2019

Finite State Machine Based Modelling of Discrete Control Algorithm in LAD Diagram Language With Use of New Generation Engineering Software.
Proceedings of the Knowledge-Based and Intelligent Information & Engineering Systems: Proceedings of the 23rd International Conference KES-2019, 2019

2013
Block Programming Technique in Traffic Control.
Proceedings of the Activities of Transport Telematics, 2013

Time Dependencies Modelling in Traffic Control Algorithms.
Proceedings of the Activities of Transport Telematics, 2013

2002
Use of Extended Semaphore Operations in Parallel Programming on a Transputer Platform.
Proceedings of the 2002 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2002), 2002


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