Kamil Mielcarek

Orcid: 0000-0003-4027-7541

According to our database1, Kamil Mielcarek authored at least 17 papers between 2017 and 2024.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of six.

Timeline

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Bibliography

2024
Hardware Reduction for FSMs With Extended State Codes.
IEEE Access, 2024

2022
Logic Synthesis for VLSI-Based Combined Finite State Machines - Synthesis Targeting ASICs, CPLDs and FPGAs
Lecture Notes in Electrical Engineering 922, Springer, ISBN: 978-3-031-16026-4, 2022

Reducing LUT Count for Mealy FSMs With Transformation of States.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Improving Characteristics of FSMs With Mixed Codes of Outputs.
IEEE Access, 2022

2020
Logic Synthesis for FPGA-Based Control Units - Structural Decomposition in Logic Design
Lecture Notes in Electrical Engineering 636, Springer, ISBN: 978-3-030-38294-0, 2020

Improving characteristics of LUT-based Mealy FSMs.
Int. J. Appl. Math. Comput. Sci., 2020

2019
Encoding of Microoperations in FPGA-Based Moore FSMs.
Proceedings of the 8th International Conference on Modern Circuits and Systems Technologies, 2019

Designing FPGA-Based Mealy FSMs with Two Levels of Logic.
Proceedings of the 8th International Conference on Modern Circuits and Systems Technologies, 2019

Decreasing Number of LUTs for Moore FSMs.
Proceedings of the 26th International Conference on Mixed Design of Integrated Circuits and Systems, 2019

2018
Hardware Reduction for Lut-Based Mealy FSMs.
Int. J. Appl. Math. Comput. Sci., 2018

Twofold state assignment for FPGA-based mealy FSMs.
Proceedings of the 7th International Conference on Modern Circuits and Systems Technologies, 2018

Encoding of Terms in LUT-based Mealy FSMs.
Proceedings of the 25th International Conference "Mixed Design of Integrated Circuits and System", 2018

Design of FPGA-based Mealy FSMs with Counters.
Proceedings of the 25th International Conference "Mixed Design of Integrated Circuits and System", 2018

Twofold State Assignment for LUT-based Mealy FSMs.
Proceedings of the 25th International Conference "Mixed Design of Integrated Circuits and System", 2018

2017
Designing Moore FSM with extended class codes.
Proceedings of the 6th International Conference on Modern Circuits and Systems Technologies, 2017

Designing HFPGA-based Mealy FSMs with transformation of output functions.
Proceedings of the 24th International Conference Mixed Design of Integrated Circuits and Systems, 2017

Designing Moore FSM with Transformation of State Codes.
Proceedings of the Computer Information Systems and Industrial Management, 2017


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