Wonhyuk Yang

According to our database, Wonhyuk Yang authored at least 6 papers between 2024 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

A Programming Model for Efficient Inter-Kernel Control-Flow on Memory-Mapped Near-Data Processing Architecture (WIP).

Seungheon Lee, Wonhyuk Yang, Seonyeong Heo, Gwangsun Kim

Proceedings of the 27th ACM SIGPLAN/SIGBED International Conference on Languages, 2026

2025

PyTorchSim: A Comprehensive, Fast, and Accurate NPU Simulation Framework.

Wonhyuk Yang, Yunseon Shin, Okkyun Woo, Geonwoo Park, Hyungkyu Ham, Jeehoon Kang, Jongse Park, Gwangsun Kim

Proceedings of the 58th IEEE/ACM International Symposium on Microarchitecture, 2025

2024

Bandwidth-Effective DRAM Cache for GPUs with Storage-Class Memory.

Jeongmin Hong, Sungjun Cho, Geonwoo Park, Wonhyuk Yang, Young-Ho Gong, Gwangsun Kim

CoRR, 2024

ONNXim: A Fast, Cycle-Level Multi-Core NPU Simulator.

Hyungkyu Ham, Wonhyuk Yang, Yunseon Shin, Okkyun Woo, Guseul Heo, Sangyeop Lee, Jongse Park, Gwangsun Kim

IEEE Comput. Archit. Lett., 2024

Low-Overhead General-Purpose Near-Data Processing in CXL Memory Expanders.

Hyungkyu Ham, Jeongmin Hong, Geonwoo Park, Yunseon Shin, Okkyun Woo, Wonhyuk Yang, Jinhoon Bae, Eunhyeok Park, Hyojin Sung, Euicheol Lim, Gwangsun Kim

Proceedings of the 57th IEEE/ACM International Symposium on Microarchitecture, 2024

Bandwidth-Effective DRAM Cache for GPU s with Storage-Class Memory.

Jeongmin Hong, Sungjun Cho, Geonwoo Park, Wonhyuk Yang, Young-Ho Gong, Gwangsun Kim

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024