Xiao Liang Tan

According to our database, Xiao Liang Tan authored at least 9 papers between 2014 and 2017.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2017

A 65-nm CMOS Constant Current Source With Reduced PVT Variation.

Dong Wang, Xiao Liang Tan, Pak Kwong Chan

IEEE Trans. Very Large Scale Integr. Syst., 2017

2016

A Performance-Aware MOSFET Threshold Voltage Measurement Circuit in a 65-nm CMOS.

Dong Wang, Xiao Liang Tan, Pak Kwong Chan

IEEE Trans. Very Large Scale Integr. Syst., 2016

A Fully Integrated Point-of-Load Digital System Supply With PVT Compensation.

Xiao Liang Tan, Pak Kwong Chan

IEEE Trans. Very Large Scale Integr. Syst., 2016

A Sub-1 V 100 mA Wide Capacitive Load Based Flipped Voltage Follower Low-Dropout Regulator Using Transient-Assisted Embedded Driving Stage.

Dong Wang, Xiao Liang Tan, Pak Kwong Chan

J. Low Power Electron., 2016

A sub-1V wide-load-range LDO regulator with sustained transient efficiency.

Dong Wang, Xiao Liang Tan, Pak Kwong Chan

Proceedings of the International Symposium on Integrated Circuits, 2016

2015

A Sub-1-V 65-nm MOS Threshold Monitoring-Based Voltage Reference.

Xiao Liang Tan, Pak Kwong Chan, Uday Dasgupta

IEEE Trans. Very Large Scale Integr. Syst., 2015

2014

A FVF LDO Regulator With Dual-Summed Miller Frequency Compensation for Wide Load Capacitance Range Applications.

Xiao Liang Tan, Kuan Chuang Koay, Sau Siong Chong, Pak Kwong Chan

IEEE Trans. Circuits Syst. I Regul. Pap., 2014

A LDO Regulator With Weighted Current Feedback Technique for 0.47 nF-10 nF Capacitive Load.

Xiao Liang Tan, Sau Siong Chong, Pak Kwong Chan, Uday Dasgupta

IEEE J. Solid State Circuits, 2014

An asynchronous sub-two-step quantizer for continuous-time sigma-delta modulators.

Xiao Liang Tan, Pak Kwong Chan, Uday Dasgupta

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014