Xiaodong Liu

Affiliations:

Fudan University, Microelectronics Department, State Key Laboratory of ASIC and System, Shanghai, China
Xidian University, Xi'an, China (former)

According to our database¹, Xiaodong Liu authored at least 6 papers between 2010 and 2017.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of four.

Timeline

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Bibliography

2017

A 18 mW 12 bit 50 MS/s SHA-less pipelined ADC.

[BibT_eX]

[DOI]

Proceedings of the 12th IEEE International Conference on ASIC, 2017

A 0.07-ppm/step differential digitally controlled crystal oscillator with guaranteed monotonicity.

[BibT_eX]

[DOI]

Proceedings of the 12th IEEE International Conference on ASIC, 2017

A 1.0-to-2.4GHz wideband VCO with uniform sub-band interval and constant tuning gain.

[BibT_eX]

[DOI]

Proceedings of the 12th IEEE International Conference on ASIC, 2017

2014

Integrated Algorithm for 3-D IC Through-Silicon Via Assignment.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2014

2011

An integrated algorithm for 3D-IC TSV assignment.

[BibT_eX]

[DOI]

Proceedings of the 48th Design Automation Conference, 2011

2010

Global routing and track assignment for flip-chip designs.

[BibT_eX]

[DOI]

Proceedings of the 47th Design Automation Conference, 2010

Xiaodong Liu

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Bibliography

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