Xingchen Chao

According to our database, Xingchen Chao authored at least 4 papers between 2022 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2023

An 8T SRAM Based Digital Compute-In-Memory Macro For Multiply-And-Accumulate Accelerating.

Zilin Wang, Hongyang Luo, ZeYang Peng, Xingchen Chao, Yajuan He

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A Low-Noise and Settling-Enhanced Switched-Capacitor Amplifier With Correlated Level Shifting and Bandwidth Switching.

Feng Tai, Ziqin Nie, Yinhao Wang, Xingchen Chao, Qiang Li

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A 128-GS/s Timing-Robust Sampling Architecture Exploiting Analog FFT.

Xingchen Chao, Qiang Li

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022

16- and 64-Point Analog Computing of FFT with Improved Performance and Efficiency.

Jingjing Li, Xingchen Chao, Qiang Li

Proceedings of the 17th Conference on Ph.D Research in Microelectronics and Electronics, 2022