Y. J. Pavitra

According to our database, Y. J. Pavitra authored at least 2 papers between 2023 and 2025.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2025

Design of compressor-based multipliers using simulated annealing for arithmetic logic unit.

Y. J. Pavitra, J. Manikandan

Neural Comput. Appl., November, 2025

2023

Design and Evaluation of Arithmetic and Logic Unit Using Simulated Annealing.

Y. J. Pavitra, Jamuna S, Manikandan J

Proceedings of the 10th International Conference on Soft Computing & Machine Intelligence, 2023