Y. T. Yang
According to our database1,
Y. T. Yang
authored at least 2 papers
between 2019 and 2025.
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Bibliography
2025
Resistive-Gate RAM: An 1TnR Architecture Feasible for Scaling Beyond 16nm CMOS Generation.
Proceedings of the IEEE International Reliability Physics Symposium, 2025
2019
Characterization of Critical Peak Current and General Model of Interconnect Systems Under Short Pulse-Width Conditions.
Proceedings of the IEEE International Reliability Physics Symposium, 2019