Yahya Jan

According to our database, Yahya Jan authored at least 10 papers between 2009 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

Quality-driven Design of Deep Neural Network Accelerators for CPS and IoT Applications.

Yahya Jan, Lech Józwiak

Proceedings of the 10th Mediterranean Conference on Embedded Computing, 2021

2014

Processor architecture exploration and synthesis of massively parallel multi-processor accelerators in application to LDPC decoding.

Yahya Jan, Lech Józwiak

Microprocess. Microsystems, 2014

2013

Design of massively parallel hardware multi-processors for highly-demanding embedded applications.

Lech Józwiak, Yahya Jan

Microprocess. Microsystems, 2013

Hardware Multi-processor Design for Highly-Demanding Applications.

Lech Józwiak, Yahya Jan

Proceedings of the Tenth International Conference on Information Technology: New Generations, 2013

2012

Communication and Memory Architecture Design of Application-Specific High-End Multiprocessors.

Yahya Jan, Lech Józwiak

VLSI Design, 2012

Scalable communication architectures for massively parallel hardware multi-processors.

Yahya Jan, Lech Józwiak

J. Parallel Distributed Comput., 2012

2010

Architecture Design of Reconfigurable Accelerators for Demanding Applications.

Lech Józwiak, Yahya Jan

Proceedings of the Seventh International Conference on Information Technology: New Generations, 2010

Quality-driven methodology for demanding accelerator design.

Lech Józwiak, Yahya Jan

Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010

2009

CABAC Accelerator Architectures for Video Compression in Future Multimedia: A Survey.

Yahya Jan, Lech Józwiak

Proceedings of the Embedded Computer Systems: Architectures, 2009

Survey of Advanced CABAC Accelerator Architectures for Future Multimedia.

Yahya Jan, Lech Józwiak

Proceedings of the Reconfigurable Computing: Architectures, 2009