Yan-Jiun Lai

According to our database, Yan-Jiun Lai authored at least 4 papers between 2017 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2019

A 4.2 nW and 18 ppm/°C Temperature Coefficient Leakage-Based Square Root Compensation (LSRC) CMOS Voltage Reference.

Chao-Jen Huang, Yan-Jiun Lai, Yu-Jheng Ou Yang, Hung-Wei Chen, Chun-Chieh Kuo, Ke-Horng Chen, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai

IEEE Trans. Circuits Syst. II Express Briefs, 2019

2018

An enhanced-security buck DC-DC converter with true-random-number-based pseudo hysteresis controller for internet-of-everything (IoE) Devices.

Wen-Hau Yang, Li-Cheng Chu, Shang-Hsien Yang, Yan-Jiun Lai, Shao-Qi Chen, Ke-Horng Chen, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2017

10.5 A three-level single-inductor triple-output converter with an adjustable flying-capacitor technique for low output ripple and fast transient response.

Li-Cheng Chu, Wen-Hau Yang, Xiao-Qing Zhang, Yan-Jiun Lai, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

Unsymmetrical parallel switched-capacitor (UP-SC) regulator with fast searching optimum ratio technique.

Yen-Ting Lin, Wen-Hau Yang, Yu-Sheng Ma, Yan-Jiun Lai, Hung-Wei Chen, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Jian-Ru Lin, Tsung-Yen Tsai

Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017