Yanbin Jiang

According to our database, Yanbin Jiang authored at least 16 papers between 1997 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Incorporating metapath interaction on heterogeneous information network for social recommendation.

Yanbin Jiang, Huifang Ma, Xiaohui Zhang, Zhixin Li, Liang Chang

Frontiers Comput. Sci., February, 2024

2022

Searching Target Communities with Outliers in attributed graph.

Qingqing Li, Huifang Ma, Ju Li, Zhixin Li, Yanbin Jiang

Knowl. Based Syst., 2022

Modelling risk and return awareness for p2p lending recommendation with graph convolutional networks.

Yuhang Liu, Huifang Ma, Yanbin Jiang, Zhixin Li

Appl. Intell., 2022

An Effective Two-way Metapath Encoder over Heterogeneous Information Network for Recommendation.

Yanbin Jiang, Huifang Ma, Xiaohui Zhang, Zhixin Li, Liang Chang

Proceedings of the ICMR '22: International Conference on Multimedia Retrieval, Newark, NJ, USA, June 27, 2022

2021

Enhancing social recommendation via two-level graph attentional networks.

Yanbin Jiang, Huifang Ma, Yuhang Liu, Zhixin Li, Liang Chang

Neurocomputing, 2021

Learning to recommend via random walk with profile of loan and lender in P2P lending.

Yuhang Liu, Huifang Ma, Yanbin Jiang, Zhixin Li

Expert Syst. Appl., 2021

Attentional Social Recommendation System with Graph Convolutional Network.

Yanbin Jiang, Huifang Ma, Yuhang Liu, Zhixin Li

Proceedings of the International Joint Conference on Neural Networks, 2021

2020

Top-N Recommendation in P2P Lending: A Hybrid Graph Ranking Using Investor Profile.

Yuhang Liu, Huifang Ma, Yanbin Jiang, Zhixin Li

Proceedings of the Neural Information Processing - 27th International Conference, 2020

Exploring User Trust and Reliability for Recommendation: A Hypergraph Ranking Approach.

Yanbin Jiang, Huifang Ma, Yuhang Liu, Zhixin Li

Proceedings of the Neural Information Processing - 27th International Conference, 2020

2016

An artificial bee colony with self-adaptive operators and alterable search depth approach for intercell scheduling.

Yanbin Jiang, Pengyu Zhou, Rongxin Zhan, Xiang Li, Dongni Li

Proceedings of the IEEE Congress on Evolutionary Computation, 2016

2001

Technology mapping for high-performance static CMOS and pass transistor logic designs.

Yanbin Jiang, Sachin S. Sapatnekar, Cyrus Bamji

IEEE Trans. Very Large Scale Integr. Syst., 2001

1999

An integrated algorithm for combined placement and libraryless technology mapping.

Yanbin Jiang, Sachin S. Sapatnekar

Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999

1998

Interleaving buffer insertion and transistor sizing into a single optimization.

Yanbin Jiang, Sachin S. Sapatnekar, Cyrus Bamji, Juho Kim

IEEE Trans. Very Large Scale Integr. Syst., 1998

A fast global gate collapsing technique for high performance designs using static CMOS and pass transistor logic.

Yanbin Jiang, Sachin S. Sapatnekar, Cyrus Bamji

Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998

Combined transistor sizing with buffer insertion for timing optimization.

Yanbin Jiang, Sachin S. Sapatnekar, Cyrus Bamji, Juho Kim

Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998

1997

Concurrent transistor sizing and buffer insertion by considering cost-delay tradeoffs.

Juho Kim, Cyrus Bamji, Yanbin Jiang, Sachin S. Sapatnekar

Proceedings of the 1997 International Symposium on Physical Design, 1997