Yaowu Mo
According to our database1,
Yaowu Mo authored at least 3 papers
between 2003 and 2026.
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Bibliography
2026
7.10 A 200MP ${0. 6 1} {\mu} \mathrm{m}$-Pixel-Pitch CMOS Imager with Sub-1e Readout Noise Using Interlaced-Shared Transistor Architecture and On-Chip Motion Artifact-Free HDR Synthesis for 8K Video Applications.
Proceedings of the IEEE International Solid-State Circuits Conference, 2026
2019
A Stacked Global-Shutter CMOS Imager with SC-Type Hybrid-GS Pixel and Self-Knee Point Calibration Single Frame HDR and On-Chip Binarization Algorithm for Smart Vision Applications.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
2003
Pipelined delay-sum architecture based on bucket-brigade devices for on-chip ultrasound beamforming.
IEEE J. Solid State Circuits, 2003