Yasuo Ohno

According to our database, Yasuo Ohno authored at least 13 papers between 1996 and 2015.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2015

Open TG-GATEs: a large-scale toxicogenomics database.

Yoshinobu Igarashi, Noriyuki Nakatsu, Tomoya Yamashita, Atsushi Ono, Yasuo Ohno, Tetsuro Urushidani, Hiroshi Yamada

Nucleic Acids Res., 2015

2013

Weighted Lonesum Matrices and Their Generating Function.

Ken Kamano, Yasuo Ohno, Shuji Yamamoto

Integers, 2013

2010

2D Device Simulation of AlGaN/GaN HFET Current Collapse Caused by Surface Negative Charge Injection.

Yusuke Ikawa, Yorihide Yuasa, Cheng-Yu Hu, Jin-Ping Ao, Yasuo Ohno

IEICE Trans. Electron., 2010

Buffer Layer Doping Concentration Measurement Using <i>V_T</i>-<i>V_SUB</i> Characteristics of GaN HEMT with p-GaN Substrate Layer.

Cheng-Yu Hu, Katsutoshi Nakatani, Hiroji Kawai, Jin-Ping Ao, Yasuo Ohno

IEICE Trans. Electron., 2010

2009

On exponential polynomials and quantum computing

Yasuo Ohno, Yoshitaka Sasaki, Chika Yamazaki

CoRR, 2009

2008

Odd perfect numbers have a prime factor exceeding 10⁸.

Takeshi Goto, Yasuo Ohno

Math. Comput., 2008

A Study on Ohmic Contact to Dry-Etched p-GaN.

Cheng-Yu Hu, Jin-Ping Ao, Masaya Okada, Yasuo Ohno

IEICE Trans. Electron., 2008

Investigation on Current Collapse of AlGaN/GaN HFET by Gate Bias Stress.

Jin-Ping Ao, Yuya Yamaoka, Masaya Okada, Cheng-Yu Hu, Yasuo Ohno

IEICE Trans. Electron., 2008

2007

On the largest prime divisor of an odd harmonic number.

Yusuke Chishiki, Takeshi Goto, Yasuo Ohno

Math. Comput., 2007

2006

Temperature and Illumination Dependence of AlGaN/GaN HFET Threshold Voltage.

Masaya Okada, Ryohei Takaki, Daigo Kikuta, Jin-Ping Ao, Yasuo Ohno

IEICE Trans. Electron., 2006

A Mechanism of Enhancement-Mode Operation of AlGaN/GaN MIS-HFET.

Daigo Kikuta, Jin-Ping Ao, Junya Matsuda, Yasuo Ohno

IEICE Trans. Electron., 2006

2005

Evaluation of Surface States of AlGaN/GaN HFET Using Open-Gated Structure.

Daigo Kikuta, Jin-Ping Ao, Yasuo Ohno

IEICE Trans. Electron., 2005

1996

A high-speed low-power tri-state driver flip flop for ultra-low supply voltage GaAs heterojunction FET LSI's.

Tadashi Maeda, Keiichi Numata, Masatoshi Tokushima, Masaoki Ishikawa, Muneo Fukaishi, Hikam Hida, Yasuo Ohno

IEEE J. Solid State Circuits, 1996