Yaun-Chung Hsu

According to our database, Yaun-Chung Hsu authored at least 5 papers between 1993 and 2008.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2008

A technique for minimizing power during FPGA placement.

Kristofer Vorwerk, Madhu Raman, Julien Dunoyer, Yaun-Chung Hsu, Arun Kundu, Andrew A. Kennings

Proceedings of the FPL 2008, 2008

1998

Finding the longest simple path in cyclic combinational circuits.

Yaun-Chung Hsu, Shangzhi Sun, David Hung-Chang Du

Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998

Timing analysis of combinational circuits containing complex gates.

Yaun-Chung Hsu, Hsi-Chuan Chen, Shangzhi Sun, David Hung-Chang Du

Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998

1994

On Valid Clocking for Combinational Circuits.

Shangzhi Sun, David Hung-Chang Du, Yaun-Chung Hsu, Hsi-Chuan Chen

Proceedings of the Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1994

1993

A Path Sensitization Approach to Area Reduction.

Hsi-Chuan Chen, Siu-Wing Cheng, Yaun-Chung Hsu, David Hung-Chang Du

Proceedings of the Proceedings 1993 International Conference on Computer Design: VLSI in Computers & Processors, 1993