Yehua Su

According to our database1, Yehua Su authored at least 6 papers between 2009 and 2014.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2014
An Integrated Framework Toward Defect-Tolerant Logic Implementation Onto Nanocrossbars.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

2013
Defect-tolerant logic hardening for crossbar-based nanosystems.
Proceedings of the Design, Automation and Test in Europe, 2013

2011
Defect-tolerant logic implementation onto nanocrossbars by exploiting mapping and morphing simultaneously.
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

2010
On mismatch number distribution of nanocrossbar logic mapping.
Proceedings of the 28th International Conference on Computer Design, 2010

2009
Runtime analysis for defect-tolerant logic mapping on nanoscale crossbar architectures.
Proceedings of the 2009 IEEE/ACM International Symposium on Nanoscale Architectures, 2009

Defect-Tolerant Logic Mapping on Nanoscale Crossbar Architectures and Yield Analysis.
Proceedings of the 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2009


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