Yifan Zhang

Orcid: 0009-0007-9920-4685

Affiliations:

Huazhong University of Science and Technology, Wuhan National Laboratory for Optoelectronics, Wuhan, China

According to our database¹, Yifan Zhang authored at least 6 papers between 2019 and 2025.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of four.

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Bibliography

2025

AIS: An Active Idleness I/O Scheduler to Reduce Buffer-Exhausted Degradation of Solid-State Drives.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., March, 2025

2024

HEncode: A Highly Modularized and Efficient FPGA QC-LDPC Encoder using High Level Synthesis.

[BibT_eX]

[DOI]

Proceedings of the 42nd IEEE International Conference on Computer Design, 2024

2023

HF-LDPC: HLS-friendly QC-LDPC FPGA Decoder with High Throughput and Flexibility.

[BibT_eX]

[DOI]

Proceedings of the 41st IEEE International Conference on Computer Design, 2023

R-LDPC: Refining Behavior Descriptions in HLS to Implement High-throughput LDPC Decoder.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2022

TLP-LDPC: Three-Level Parallel FPGA Architecture for Fast Prototyping of LDPC Decoder Using High-Level Synthesis.

[BibT_eX]

[DOI]

Yi-Fan Zhang

Lei Sun

Qiang Cao

J. Comput. Sci. Technol., 2022

2019

LT-TCO: A TCO Calculation Model of Data Centers for Long-Term Data Preservation.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE International Conference on Networking, 2019

Yifan Zhang

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