Yifan Zhang

According to our database, Yifan Zhang authored at least 7 papers between 2019 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

eLDPC: An Elastic and Scalable LDPC-Decoder With Early Termination by Effectively Leveraging High-Level Synthesis.

Shaohua Wang, Zhihao Zeng, Qiang Cao, Jiawei Yang, Yifan Zhang, Yekang Zhan, Jie Yao

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., June, 2026

2025

AIS: An Active Idleness I/O Scheduler to Reduce Buffer-Exhausted Degradation of Solid-State Drives.

Yekang Zhan, Xiangrui Yang, Haichuan Hu, Qiang Cao, Yifan Zhang, Jie Yao

ACM Trans. Archit. Code Optim., March, 2025

2024

HEncode: A Highly Modularized and Efficient FPGA QC-LDPC Encoder using High Level Synthesis.

Jiawei Yang, Shaohua Wang, Xiangrui Yang, Yifan Zhang, Qiang Cao, Jie Yao, Xiaodi Tan, Xiao Lin

Proceedings of the 42nd IEEE International Conference on Computer Design, 2024

2023

HF-LDPC: HLS-friendly QC-LDPC FPGA Decoder with High Throughput and Flexibility.

Yifan Zhang, Qiang Cao, Shaohua Wang, Jie Yao, Hong Jiang

Proceedings of the 41st IEEE International Conference on Computer Design, 2023

R-LDPC: Refining Behavior Descriptions in HLS to Implement High-throughput LDPC Decoder.

Yifan Zhang, Qiang Cao, Jie Yao, Hong Jiang

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2022

TLP-LDPC: Three-Level Parallel FPGA Architecture for Fast Prototyping of LDPC Decoder Using High-Level Synthesis.

Yi-Fan Zhang, Lei Sun, Qiang Cao

J. Comput. Sci. Technol., 2022

2019

LT-TCO: A TCO Calculation Model of Data Centers for Long-Term Data Preservation.

Wenrui Yan, Jie Yao, Qiang Cao, Yifan Zhang

Proceedings of the 2019 IEEE International Conference on Networking, 2019