Yinuo Bai

Orcid: 0000-0003-3019-8524

According to our database1, Yinuo Bai authored at least 6 papers between 2024 and 2025.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2025
BANG: Dividing 3D Assets via Generative Exploded Dynamics.
ACM Trans. Graph., August, 2025

2024
CSP: Comprehensively-Sparsified Preconditioner for Efficient Nonlinear Circuit Simulation.
Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, 2024

Cuper: Customized Dataflow and Perceptual Decoding for Sparse Matrix-Vector Multiplication on HBM-Equipped FPGAs.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

Efficient Spectral-Aware Power Supply Noise Analysis for Low-Power Design Verification.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

Unleashing the Potential of AQFP Logic Placement via Entanglement Entropy and Projection.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

Machine Learning and GPU Accelerated Sparse Linear Solvers for Transistor-Level Circuit Simulation: A Perspective Survey (Invited Paper).
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024


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