Zhou Jin
Orcid: 0000-0002-0632-9494Affiliations:
- China University of Petroleum, College of Information Science and Engineering, Beijing, China
- Waseda University, Research Center, Kitakyushu, Japan (former, PhD 2015)
According to our database1,
Zhou Jin
authored at least 26 papers
between 2013 and 2023.
Collaborative distances:
Collaborative distances:
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Bibliography
2023
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023
ACM Trans. Design Autom. Electr. Syst., March, 2023
IEEE Trans. Circuits Syst. II Express Briefs, 2023
PanguLU: A Scalable Regular Two-Dimensional Block-Cyclic Sparse Direct Solver on Distributed Heterogeneous Systems.
Proceedings of the International Conference for High Performance Computing, 2023
Accelerating Sparse LU Factorization with Density-Aware Adaptive Matrix Multiplication for Circuit Simulation.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023
2022
TileSpGEMM: a tiled algorithm for parallel sparse general matrix-matrix multiplication on GPUs.
Proceedings of the PPoPP '22: 27th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, Seoul, Republic of Korea, April 2, 2022
A survey and perspective on electronic design automation tools for ensuring SoC security.
Proceedings of the 19th International SoC Design Conference, 2022
TileSpMSpV: A Tiled Algorithm for Sparse Matrix-Sparse Vector Multiplication on GPUs.
Proceedings of the 51st International Conference on Parallel Processing, 2022
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022
2021
Int. J. Parallel Program., 2021
CCF Trans. High Perform. Comput., 2021
Proceedings of the 35th IEEE International Parallel and Distributed Processing Symposium, 2021
PALBBD: A Parallel ArcLength Method Using Bordered Block Diagonal Form for DC Analysis.
Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021
SFLU: Synchronization-Free Sparse LU Factorization for Fast Circuit Simulation on GPUs.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
2020
Two-Phase Multivariate Time Series Clustering to Classify Urban Rail Transit Stations.
IEEE Access, 2020
2018
An adaptive dynamic-element PTA method for solving nonlinear DC operating point of transistor circuits.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018
2017
An Adaptive Time-Step Control Method in Damped Pseudo-Transient Analysis for Solving Nonlinear DC Circuit Equations.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017
2015
A netlist implementation of the Newton fixed-point homotopy method for MOS transistor circuits.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015
2014
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014
A ramping method combined with the damped PTA algorithm to find the DC operating points for nonlinear circuits.
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014
2013
An Effective and Globally Convergent Newton Fixed-Point Homotopy Method for MOS Transistor Circuits.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013
Effective Implementation and Embedding Algorithms of CEPTA Method for Finding DC Operating Points.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013