You-Gang Chen

According to our database1, You-Gang Chen authored at least 5 papers between 2005 and 2013.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2013
A Fast-Locking All-Digital Deskew Buffer With Duty-Cycle Correction.
IEEE Trans. Very Large Scale Integr. Syst., 2013

2009
Design and Implementation of Cost-Effective Probabilistic-Based Noise-Tolerant VLSI Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009

2008
Design and Analysis of Isolated Noise-Tolerant (INT) Technique in Dynamic CMOS Circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2008

2007
Low-Latency Quasi-Synchronous Transmission Technique for Multiple-Clock-Domain IP Modules.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2005
A 2Gb/s high-speed scalable shift-register based on-chip serial communication design for SoC applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005


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