Young H. Cho

According to our database1, Young H. Cho authored at least 34 papers between 2002 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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On csauthors.net:

Bibliography

2017
Fine-grained on-line power monitoring for soft microprocessor based system-on-chip.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2017

2016
Accelerating physical level sub-component power simulation by online power partitioning.
Proceedings of the 17th International Symposium on Quality Electronic Design, 2016

2015
Accurate in-situ runtime measurement of energy per operation of system-on-chip on FPGA.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015

2013
Efficient PMU networking with software defined networks.
Proceedings of the IEEE Fourth International Conference on Smart Grid Communications, 2013

A phantom study of tumor localization using biomimetic electrostatic imaging.
Proceedings of the 6th International Conference on Biomedical Engineering and Informatics, 2013

2012
Water temperature sensing with microtomography.
Int. J. Sens. Networks, 2012

Physical layer sensing using long pseudo noise codes.
Proceedings of the Conference on Under Water Networks, 2012

Realtime in-ocean submerged collision avoidance via biomimetic electrostatic imaging.
Proceedings of the Conference on Under Water Networks, 2012

2011
Marina-Scale Water Temperature Sensing in Real Time Using Microtomography.
Proceedings of the 31st IEEE International Conference on Distributed Computing Systems Workshops (ICDCS 2011 Workshops), 2011

2010
Hardware-Accelerated RNA Secondary-Structure Alignment.
ACM Trans. Reconfigurable Technol. Syst., 2010

On the interaction of clocks, power, and synchronization in duty-cycled embedded sensor nodes.
ACM Trans. Sens. Networks, 2010

2008
Reconfigurable content-based router using hardware-accelerated language parser.
ACM Trans. Design Autom. Electr. Syst., 2008

Deep network packet filter design for reconfigurable devices.
ACM Trans. Embed. Comput. Syst., 2008

Exploiting manufacturing variations for compensating environment-induced clock drift in time synchronization.
Proceedings of the 2008 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems, 2008

Application-specific trace compression for low bandwidth trace logging.
Proceedings of the 6th International Conference on Embedded Networked Sensor Systems, 2008

The True Cost of Accurate Time.
Proceedings of the Workshop on Power Aware Computing and Systems, 2008

Low-power high-accuracy timing systems for efficient duty cycling.
Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008

2007
Dynamically Optimizing FPGA Applications by Monitoring Temperature and Workloads.
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

Adaptive Thermoregulation for Applications on Reconfigurable Devices.
Proceedings of the FPL 2007, 2007

Changing Output Quality for Thermal Management.
Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines, 2007

2006
Reconfigurable context-free grammar based data processing hardware with error recovery.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

Context-Free-Grammar based Token Tagger in Reconfigurable Devices.
Proceedings of the 22nd International Conference on Data Engineering Workshops, 2006

A Reconfigurable Architecture for Multi-Gigabit Speed Content-Based Routing.
Proceedings of the 14th IEEE Symposium on High-Performance Interconnects, 2006

An adaptive frequency control method using thermal feedback for reconfigurable hardware applications.
Proceedings of the 2006 IEEE International Conference on Field Programmable Technology, 2006

Implementation of Network Application Layer Parser for Multiple TCP/IP Flows in Reconfigurable Devices.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

A Thermal Management and Profiling Method for Reconfigurable Hardware Applications.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

High Speed Document Clustering in Reconfigurable Hardware.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

Hierarchical Clustering using Reconfigurable Devices.
Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

A Scalable Hybrid Regular Expression Pattern Matcher.
Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

Scalable Softcore Vector Processor for Biosequence Applications.
Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

2005
Fast Reconfiguring Deep Packet Filter for 1+ Gigabit Network.
Proceedings of the 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 2005

A pattern matching coprocessor for network security.
Proceedings of the 42nd Design Automation Conference, 2005

2004
Deep Packet Filter with Dedicated Logic and Read Only Memories.
Proceedings of the 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 2004

2002
Specialized Hardware for Deep Network Packet Filtering.
Proceedings of the Field-Programmable Logic and Applications, 2002


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