Yu-Cherng Hung

According to our database, Yu-Cherng Hung authored at least 7 papers between 2006 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2018

A Study on Electroluminescent Phenomenon for Solar Cells Test.

Chia-Chun Wu, Yu-Cherng Hung

Proceedings of the 1st IEEE International Conference on Knowledge Innovation and Invention, 2018

2014

Complementary and Double-Edge Based: a 5-Bit CMOS Digital Pulse-Width modulation (PWM) Design with Multiple outputs for LED dimming Application.

Yu-Cherng Hung

J. Circuits Syst. Comput., 2014

2011

A Survey of Low-voltage Low-Power Techniques and Challenges for CMOS Digital Circuits.

Yu-Cherng Hung, Shao-Hui Shieh, Chiou-Kou Tung

J. Circuits Syst. Comput., 2011

2009

High-Speed CMOS Chip Design for Manchester and Miller Encoder.

Yu-Cherng Hung, Min-Ming Kuo, Chiou-Kou Tung, Shao-Hui Shieh

Proceedings of the Fifth International Conference on Intelligent Information Hiding and Multimedia Signal Processing (IIH-MSP 2009), 2009

Design High-Performance and Low-Power Adder Cores with Full-Swing Nodes for Embedded Systems.

Ching-Hwa Cheng, Chiou-Kou Tung, Shao-Hui Shieh, Yu-Cherng Hung

Proceedings of the Fifth International Conference on Intelligent Information Hiding and Multimedia Signal Processing (IIH-MSP 2009), 2009

2007

A Low-Power High-Speed Hybrid CMOS Full Adder for Embedded System.

Chiou-Kou Tung, Yu-Cherng Hung, Shao-Hui Shieh, Guo-Shing Huang

Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), 2007

2006

High-Performance Low-Power Full-Swing Full Adder Cores with Output Driving Capability.

Chiou-Kou Tung, Shao-Hui Shieh, Yu-Cherng Hung, Ming-Chien Tsai

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006