Shao-Hui Shieh

According to our database, Shao-Hui Shieh authored at least 11 papers between 1996 and 2011.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2011

A Survey of Low-voltage Low-Power Techniques and Challenges for CMOS Digital Circuits.

Yu-Cherng Hung, Shao-Hui Shieh, Chiou-Kou Tung

J. Circuits Syst. Comput., 2011

Fabricating zinc oxide semiconductor device of flexible substrate by using the spin-coating method.

Hsin-Chiang You, Shiang-Jun Zhang, Shao-Hui Shieh, Chiou-Kou Tung

Proceedings of the 6th IEEE International Conference on Nano/Micro Engineered and Molecular Systems, 2011

Fabrication of sol-gel-derived zinc oxide thin-film transistor.

Shao-Hui Shieh, Hsin-Chiang You, Chyi-Yau Shao

Proceedings of the 6th IEEE International Conference on Nano/Micro Engineered and Molecular Systems, 2011

2009

High-Speed CMOS Chip Design for Manchester and Miller Encoder.

Yu-Cherng Hung, Min-Ming Kuo, Chiou-Kou Tung, Shao-Hui Shieh

Proceedings of the Fifth International Conference on Intelligent Information Hiding and Multimedia Signal Processing (IIH-MSP 2009), 2009

Design High-Performance and Low-Power Adder Cores with Full-Swing Nodes for Embedded Systems.

Ching-Hwa Cheng, Chiou-Kou Tung, Shao-Hui Shieh, Yu-Cherng Hung

Proceedings of the Fifth International Conference on Intelligent Information Hiding and Multimedia Signal Processing (IIH-MSP 2009), 2009

2007

A Low-Power High-Speed Hybrid CMOS Full Adder for Embedded System.

Chiou-Kou Tung, Yu-Cherng Hung, Shao-Hui Shieh, Guo-Shing Huang

Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), 2007

2006

High-Performance Low-Power Full-Swing Full Adder Cores with Output Driving Capability.

Chiou-Kou Tung, Shao-Hui Shieh, Yu-Cherng Hung, Ming-Chien Tsai

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2004

A novel radix-4 bit-level modular multiplier for fast RSA cryptosystem.

Jin-Hua Hong, Bin-Yan Tsai, Liang-Te Lu, Shao-Hui Shieh

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003

Asymmetric High-Radix Signed-Digit Number Systems for Carry-Free Addition.

Shao-Hui Shieh, Cheng-Wen Wu

J. Inf. Sci. Eng., 2003

2000

A fast signature computation algorithm for LFSR and MISR.

Bin-Hong Lin, Shao-Hui Shieh, Cheng-Wen Wu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000

1996

A MISR Computation Algorithm for Fast Signature Simulation.

Bin-Hong Lin, Shao-Hui Shieh, Cheng-Wen Wu

Proceedings of the 5th Asian Test Symposium (ATS '96), 1996