Yuho Jin

According to our database1, Yuho Jin authored at least 17 papers between 2005 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2018
3D-PIM NoCs with Multiple Subnetworks: A Performance and Power Evaluation.
Proceedings of the 37th IEEE International Performance Computing and Communications Conference, 2018

2017
Performance Evaluation of Mesh-based 3D NoCs.
Proceedings of the 10th International Workshop on Network on Chip Architectures, 2017

Packet coalescing exploiting data redundancy in GPGPU architectures.
Proceedings of the International Conference on Supercomputing, 2017

2015
Intra-Clustering: Accelerating On-chip Communication for Data Parallel Architectures.
Proceedings of the 2015 International Symposium on Computer Architecture and High Performance Computing Workshops, 2015

Unifying Router Power Gating with Data Placement for Energy-Efficient NoC.
Proceedings of the 27th International Symposium on Computer Architecture and High Performance Computing, 2015

2014
PAIS: Parallelism-aware interconnect scheduling in multicores.
ACM Trans. Embed. Comput. Syst., 2014

2013
Adaptive Packet Resizing by Spatial Locality and Data Sharing for Energy-Efficient NOC.
Proceedings of the 19th IEEE International Conference on Parallel and Distributed Systems, 2013

2012
Communication-Aware Globally-Coordinated On-Chip Networks.
IEEE Trans. Parallel Distributed Syst., 2012

2011
Adaptive Data Compression for Low-Power On-Chip Networks.
Proceedings of the Low Power Networks-on-Chip., 2011

2010
Design and Analysis of On-Chip Networks for Large-Scale Cache Systems.
IEEE Trans. Computers, 2010

A Framework for End-to-End Simulation of High-performance Computing Systems.
Simul., 2010

Integration of admission, congestion, and peak power control in QoS-aware clusters.
J. Parallel Distributed Comput., 2010

Thread criticality support in on-chip networks.
Proceedings of the Third International Workshop on Network on Chip Architectures, 2010

2009
Recursive partitioning multicast: A bandwidth-efficient routing for Networks-on-Chip.
Proceedings of the Third International Symposium on Networks-on-Chips, 2009

2008
Adaptive data compression for high-performance low-power on-chip networks.
Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), 2008

2007
A Domain-Specific On-Chip Network Design for Large Scale Cache Systems.
Proceedings of the 13st International Conference on High-Performance Computer Architecture (HPCA-13 2007), 2007

2005
Peak Power Control for a QoS Capable On-Chip Network.
Proceedings of the 34th International Conference on Parallel Processing (ICPP 2005), 2005


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