Yusuke Shirota

According to our database, Yusuke Shirota authored at least 7 papers between 2011 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2020

Machine Learning-Based Prefetching for SCM Main Memory System.

Mayuko Koezuka, Yusuke Shirota, Satoshi Shirai, Tatsunori Kanai

Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, 2020

2019

A perspective on NVRAM technology for future computing system.

Katsuhiko Hoya, Kosuke Hatsuda, Kenji Tsuchida, Yohji Watanabe, Yusuke Shirota, Tatsunori Kanai

Proceedings of the International Symposium on VLSI Design, Automation and Test, 2019

Hybrid Access in Storage-class Memory-aware Low Power Virtual Memory System.

Yusuke Shirota, Satoshi Shirai, Tatsunori Kanai

Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2019

2016

Powering-off DRAM with aggressive page-out to storage-class memory in low power virtual memory system.

Yusuke Shirota, Shiyo Yoshimura, Satoshi Shirai, Tatsunori Kanai

Proceedings of the 2016 IEEE Symposium in Low-Power and High-Speed Chips, 2016

2015

Electronic Paper Display update scheduler for extremely low power non-volatile embedded systems.

Yusuke Shirota, Shiyo Yoshimura, Tatsunori Kanai

Proceedings of the 2015 IEEE Symposium in Low-Power and High-Speed Chips, 2015

2014

Aggressive use of Deep Sleep mode in low power embedded systems.

Jun'ichi Segawa, Yusuke Shirota, Koichi Fujisaki, Tetsuro Kimura, Tatsunori Kanai

Proceedings of the 2014 IEEE Symposium on Low-Power and High-Speed Chips, 2014

2011

Autotuning in an Array Processing Language using High-level Program Transformations.

Yusuke Shirota, Jun'ichi Segawa, Masaya Tarui, Tatsunori Kanai

Proceedings of the International Conference on Computational Science, 2011