Zbigniew Jachna

According to our database, Zbigniew Jachna authored at least 5 papers between 2001 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2017

Four-channel, precise, time-event recorder in programmable device.

Ryszard Szplet, Pawel Kwiatkowski, Zbigniew Jachna, Krzysztof Rozyc

Proceedings of the 3rd International Conference on Event-Based Control, 2017

2016

An Eight-Channel 4.5-ps Precision Timestamps-Based Time Interval Counter in FPGA Chip.

Ryszard Szplet, Pawel Kwiatkowski, Zbigniew Jachna, Krzysztof Rozyc

IEEE Trans. Instrum. Meas., 2016

A time digitizer based on multiphase clock implemented in FPGA device.

Pawel Kwiatkowski, Ryszard Szplet, Zbigniew Jachna, Krzysztof Rozyc

Proceedings of the Second International Conference on Event-based Control, 2016

2006

Metastability tests of flip-flops in programmable digital circuits.

Józef Kalisz, Zbigniew Jachna

Microelectron. J., 2006

2001

Practical Aspects of Logic Synthesis Based on Functional Decomposition.

Mariusz Rawski, Rafal Rzechowski, Zbigniew Jachna, Ireneusz Brzozowski

Proceedings of the Euromicro Symposium on Digital Systems Design 2001 (Euro-DSD 2001), 2001