Zeeshan Ali

Orcid: 0000-0003-4660-4822

According to our database1, Zeeshan Ali authored at least 7 papers between 2020 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2025
De-Embedding Methodology to Characterize Linearity of Active Filters Under Process Variations.
IEEE Trans. Very Large Scale Integr. Syst., May, 2025

Cryo-CMOS 0.432mW UHF Filter for Scalable Quantum Computing in 22nm FD-SOI Technology.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

2024
Impact of Receiver Thermal Noise and PLL RMS Jitter in Radar Measurements.
IEEE Trans. Instrum. Meas., 2024

2023
Stability Analysis for Fast Settling Switched Digital Phase-Locked Loops (DPLLs).
IEEE Control. Syst. Lett., 2023

2022
A Fast Locking Ring Oscillator Based Fractional-N DPLL With an Assistance From a LUT-Based FSM.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2020
A Fast Settling Fractional-N DPLL With Loop-Order Switching.
IEEE Trans. Very Large Scale Integr. Syst., 2020

A Low Jitter Double-Tailed Strong-Arm Latch Based Digital-to-Time Converter (DTC).
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020


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