Zeyang Xu

Orcid: 0009-0008-5311-1974

According to our database1, Zeyang Xu authored at least 9 papers between 2022 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

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Bibliography

2025
A Time-Borrowing Method for High-Performance Bundled-Data Asynchronous Circuits.
Proceedings of the 26th International Symposium on Quality Electronic Design, 2025

2024
Toward Efficient Asynchronous Circuits Design Flow Using Backward Delay Propagation Constraint.
IEEE Trans. Very Large Scale Integr. Syst., October, 2024

LAC: A Novel Lightweight Asynchronous Controller With Optimized Phase Shift.
IEEE Trans. Circuits Syst. II Express Briefs, August, 2024

Better-Than-Worst-Case: A Frequency Adaptation Asynchronous RISC-V Core With Vector Extension.
IEEE Trans. Very Large Scale Integr. Syst., June, 2024

An FPGA-based QDI Asynchronous Circuits Design Methodology.
Proceedings of the IEEE International Conference on Integrated Circuits, 2024

An Efficient Asynchronous Circuits Design Flow with Backward Delay Propagation Constraint.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

2023
Towards Energy-Efficient Asynchronous Circuit Design with Flip-Flop-to-Latch Replacement.
Proceedings of the IEEE International Conference on Integrated Circuits, 2023

2022
Physical random access signal design for 5G mobile satellite communication systems.
Phys. Commun., 2022

DFT Architecture for Click-Based Bundled-Data Asynchronous Circuits.
Proceedings of the 2022 IEEE International Conference on Integrated Circuits, 2022


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