Zhaoliang Pan

According to our database1, Zhaoliang Pan authored at least 3 papers between 2007 and 2012.

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Bibliography

2012
Error Rate Estimation for Defective Circuits via Ones Counting.
ACM Trans. Design Autom. Electr. Syst., 2012

2008
Basing Acceptable Error-Tolerant Performance on Significance-Based Error-rate (SBER).
Proceedings of the 26th IEEE VLSI Test Symposium (VTS 2008), April 27, 2008

2007
Estimating Error Rate in Defective Logic Using Signature Analysis.
IEEE Trans. Computers, 2007


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