Zihao Jiao

Orcid: 0000-0001-9949-9216

According to our database1, Zihao Jiao authored at least 12 papers between 2020 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Other 

Links

On csauthors.net:

Bibliography

2023
A 1.25-MHz-BW, 83-dB SNDR Pipelined Noise-Shaping SAR ADC With MASH 2-2 Structure and kT/C Noise Cancellation.
IEEE Trans. Circuits Syst. II Express Briefs, October, 2023

An 84dB-SNDR 1-0 Quasi-MASH NS SAR with LSB Repeating and 12-bit Bridge-Crossing Segmented CDAC.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

2022
A 2.5-MHz BW, 75-dB SNDR Noise-Shaping SAR ADC With a 1st-Order Hybrid EF-CIFF Structure Assisted by Unity-Gain Buffer.
IEEE Trans. Very Large Scale Integr. Syst., 2022

A 1-V 2.69-ppm/°C 0.8-μW bandgap reference with piecewise exponential curvature compensation.
Microelectron. J., 2022

Integrating vehicle-to-grid contract design with power dispatching optimisation: managerial insights, and carbon footprints mitigation.
Int. J. Prod. Res., 2022

2021
A Closed-Loop Neuromodulation Chipset With 2-Level Classification Achieving 1.5-Vpp CM Interference Tolerance, 35-dB Stimulation Artifact Rejection in 0.5ms and 97.8%-Sensitivity Seizure Detection.
IEEE Trans. Biomed. Circuits Syst., 2021

A 14-Bit 2.8GS/s DAC with DTIRZ technique in 65 nm CMOS.
IEICE Electron. Express, 2021

Linearity Boosting Technique with Adaptive Sampling Switch Assisted by Signal Prediction for Multi-Channel ADCs in Standard CMOS Process.
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2021, Oslo, 2021

A 1<sup>st</sup>-Order Passive Noise-Shaping SAR ADC with Improved NTF Assisted by Comparator Gain Calibration.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
Rebalancing Bike Sharing Systems for Minimizing Depot Inventory and Traveling Costs.
IEEE Trans. Intell. Transp. Syst., 2020

A Configurable Noise-Shaping Band-Pass SAR ADC With Two-Stage Clock-Controlled Amplifier.
IEEE Trans. Circuits Syst., 2020

A +0.66/-0.73 °C Inaccuracy, 1.99-μW Time-Domain CMOS Temperature Sensor With Second-Order ΔΣ Modulator and On-Chip Reference Clock.
IEEE Trans. Circuits Syst., 2020


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