Adib Abrishamifar

Orcid: 0000-0001-6117-8839

According to our database1, Adib Abrishamifar authored at least 28 papers between 2006 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
A very low-power discrete-time delta-sigma modulator for wireless body area network.
Microelectron. J., 2022

2021
A Simple and Adjustable Technique for Effective Linearization of Power Amplifiers Using Harmonic Injection.
IEEE Access, 2021

2020
On the design of robust, low power with high noise immunity quaternary circuits.
Microelectron. J., 2020

Evaluating a Methodology for Designing CNFET-Based Ternary Circuits.
Circuits Syst. Signal Process., 2020

2019
A New Method for Design of CNFET-Based Quaternary Circuits.
Circuits Syst. Signal Process., 2019

2018
A high precision analog multiplexer for multi-channel neural recording micro-systems.
Microelectron. J., 2018

A Simple and Efficient Charge Injection Error Compensation Structure for MOS Sampling Switches.
J. Circuits Syst. Comput., 2018

A novel analog switch for high-precision switched-capacitor applications.
Int. J. Circuit Theory Appl., 2018

A novel OTA compensation approach suitable for CT-ΔΣ modulators.
Int. J. Circuit Theory Appl., 2018

2017
System level design and analysis of a fourth-order continuous-time delta-sigma modulator using relaxed gain-band-width amplifiers.
Int. J. Circuit Theory Appl., 2017

An inductorless wideband LNA with a new noise canceling technique.
Turkish J. Electr. Eng. Comput. Sci., 2017

2015
A High-Linear CMOS Down Conversion Mixer Using Adjusting the Second and Third-Order Harmonic in Transconductance Stage.
J. Circuits Syst. Comput., 2015

2014
A cross coupled low phase noise oscillator using an output swing enhancement technique.
Microelectron. J., 2014

A Fast and Low Settling error continuous-Time Common-mode feedback Circuit Based on differential difference amplifier.
J. Circuits Syst. Comput., 2014

2012
Nonlinear observer for Induction Motor to Improve Efficiency and Dynamic stability Analysis in FOC Method.
J. Circuits Syst. Comput., 2012

Current controlled current differential current conveyor: a novel building block for analog signal processing.
IEICE Electron. Express, 2012

2011
A low voltage low power CMOS analog multiplier.
Proceedings of the 2011 NORCHIP, Lund, Sweden, November 14-15, 2011, 2011

2010
A novel current conveyor with high functionality and optimized ports.
IEICE Electron. Express, 2010

2009
A low voltage highly linear CMOS up conversion mixer based on current conveyor.
IEICE Electron. Express, 2009

A new CMOS all-pass phase shifter for phased array systems.
IEICE Electron. Express, 2009

A novel CMOS all-pass tunable phase shifter.
Proceedings of the 16th IEEE International Conference on Electronics, 2009

A new high speed, low power adder; using hybrid analog-digital circuits.
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009

A low voltage CMOS analog multiplier with high linearity.
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009

Investigating the linearity of MOSFET-only switched-capacitor DeltaSigma modulators under low-voltage condition.
Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2009

2008
Low power and high gain current reuse LNA with modified input matching and inter-stage inductors.
Microelectron. J., 2008

2007
A low-power and high-gain fully integrated CMOS LNA.
Microelectron. J., 2007

An FPGA-based irrational decimator for digital receivers.
Proceedings of the 9th International Symposium on Signal Processing and Its Applications, 2007

2006
A Wide-Range Delay-Locked Loop with a New Lock-Detect Circuit.
Proceedings of the 13th IEEE International Conference on Electronics, 2006


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