Ahmed Abuelnasr

Orcid: 0000-0002-2153-4496

According to our database1, Ahmed Abuelnasr authored at least 10 papers between 2020 and 2025.

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Bibliography

2025
A Tunable and Area-Efficient Delayed Fault Detection Circuit for Voltage Monitoring Systems with 10.19% Voltage Sensitivity.
Proceedings of the 23rd IEEE Interregional NEWCAS Conference, 2025

A Comparative Analysis of Off-Policy DRL Strategies for Analog Circuit Optimization: A Case Study on Bandgap References.
Proceedings of the 23rd IEEE Interregional NEWCAS Conference, 2025

2024
Incremental reinforcement learning for multi-objective analog circuit design acceleration.
Eng. Appl. Artif. Intell., 2024

Enhanced Dynamic Regulation in Buck Converters: Integrating Input-Voltage Feedforward With Voltage-Mode Feedback.
IEEE Access, 2024

2023
Delay Mismatch Insensitive Dead Time Generator for High-Voltage Switched-Mode Power Amplifiers.
IEEE Trans. Circuits Syst. I Regul. Pap., April, 2023

2021
Design and Analysis of Combined Input-Voltage Feedforward and PI Controllers for the Buck Converter.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Causal Information Prediction for Analog Circuit Design Using Variable Selection Methods Based on Machine Learning.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
A 1.99-ns 0.5-pJ Wide Frequency Range Level Shifter With Closed-Loop Negative Feedback.
Proceedings of the 18th IEEE International New Circuits and Systems Conference, 2020

Fully Integrated Dual-Channel Gate Driver and Area Efficient PID Compensator for Surge Tolerant Power Sensor Interface.
Proceedings of the 18th IEEE International New Circuits and Systems Conference, 2020

Self-Adjusting Deadtime Generator for High-Efficiency High-Voltage Switched-Mode Power Amplifiers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020


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