Morteza Nabavi

Orcid: 0000-0001-7960-471X

According to our database1, Morteza Nabavi authored at least 23 papers between 2012 and 2024.

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Bibliography

2024
DNN-Based Optimization to Significantly Speed Up and Increase the Accuracy of Electronic Circuit Design.
IEEE Trans. Circuits Syst. I Regul. Pap., March, 2024

2023
An OOK and Binary FSK Reconfigurable Dual-Band Noncoherent IR-UWB Receiver Supporting Ternary Signaling.
IEEE Trans. Very Large Scale Integr. Syst., May, 2023

2022
IBU: An In-Block Update Address Mapping Scheme for Solid-State Drives.
IEEE Access, 2022

A Hybrid Approach Based on Recurrent Neural Network for Macromodeling of Nonlinear Electronic Circuits.
IEEE Access, 2022

A Versatile SoC/SiP Sensor Interface for Industrial Applications: Implementation Challenges.
IEEE Access, 2022

RLBEEP: Reinforcement-Learning-Based Energy Efficient Control and Routing Protocol for Wireless Sensor Networks.
IEEE Access, 2022

2021
Non-parametric Statistical Static Timing Analysis based on Improved Parallel Monte Carlo.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

2020
Multi-Channel Neural Recording Implants: A Review.
Sensors, 2020

A Real-Time Thermal Monitoring System Intended for Embedded Sensors Interfaces.
Sensors, 2020

A CMOS MAGFET-Based Programmable Isolation Amplifier.
Proceedings of the 18th IEEE International New Circuits and Systems Conference, 2020

Fully Integrated Dual-Channel Gate Driver and Area Efficient PID Compensator for Surge Tolerant Power Sensor Interface.
Proceedings of the 18th IEEE International New Circuits and Systems Conference, 2020

SRAM Security and Vulnerability To Hardware Trojan: Design Considerations.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

A Fully Integrated On-Chip Inductive Digital Isolator: Design Investigation and Simulation.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

A High Efficiency and Fast Response PLL Based Buck Converter: Implementation and Simulation.
Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020

Wide Dynamic Range Front-End Programmable Isolation Amplifier using Integrated CMOS Hall Effect Sensor.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A Versatile Non-Overlapping Signal Generator for Efficient Power-Converters Operation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A Tunable CMOS Thyristor-Based Pulse Generator for Integrated Sensor Interface Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Self-Adjusting Deadtime Generator for High-Efficiency High-Voltage Switched-Mode Power Amplifiers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
A Versatile SoC/SiP Sensor Interface for Industrial Applications: Design Considerations.
Proceedings of the 31st International Conference on Microelectronics, 2019

A 2.77μW, 80 ppm/°C Temperature Coefficient Voltage Reference for Biomedical Implants.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

2018
A 290-mV, 3.34-MHz, 6T SRAM With pMOS Access Transistors and Boosted Wordline in 65-nm CMOS Technology.
IEEE J. Solid State Circuits, 2018

Temperature Independent Subthreshold Circuits Design.
Proceedings of the International SoC Design Conference, 2018

2012
A gate sizing and transistor fingering strategy for subthreshold CMOS circuits.
IEICE Electron. Express, 2012


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