Ahmet Ceyhan

According to our database1, Ahmet Ceyhan authored at least 6 papers between 2012 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
GT2N: An Open-Source 2nm Nanosheet PDK Enabling Multi-Width/VT Benchmarking.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

2014
Performance modeling for emerging interconnect technologies in CMOS and beyond-CMOS circuits.
Proceedings of the International Symposium on Low Power Electronics and Design, 2014

BEOL Scaling Limits and Next Generation Technology Prospects.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013
System-level optimization and benchmarking for InAs nanowire based gate-all-around tunneling FETs.
Proceedings of the International Symposium on Quality Electronic Design, 2013

Impact of conventional and emerging interconnects on the circuit performance of various post-CMOS devices.
Proceedings of the International Symposium on Quality Electronic Design, 2013

2012
System-level design and performance modeling for multilevel interconnect networks for carbon nanotube field-effect transistors.
Proceedings of the IEEE International Conference on IC Design & Technology, 2012


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