Sou-Chi Chang
Orcid: 0000-0001-8128-7784
According to our database1,
Sou-Chi Chang authored at least 4 papers
between 2014 and 2024.
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Bibliography
2024
Endurance-Aware Compiler for 3-D Stackable FeRAM as Global Buffer in TPU-Like Architecture.
IEEE Trans. Very Large Scale Integr. Syst., September, 2024
Reliable Low-Voltage FeRAM Capacitors for High-Speed Dense Embedded Memory in Advanced CMOS.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
2016
Low-power Spin Valve Logic using Spin-transfer Torque with Automotion of Domain Walls.
CoRR, 2016
2014
Performance modeling for emerging interconnect technologies in CMOS and beyond-CMOS circuits.
Proceedings of the International Symposium on Low Power Electronics and Design, 2014