Akshat Boora

According to our database, Akshat Boora authored at least 4 papers between 2019 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2020

UniCaP-2: Phase-Locked Adaptive Clocking with Rapid Clock Cycle Recovery in 65nm CMOS.

Xun Sun, Akshat Boora, Rajesh Pamula, Chi-Hsiang Huang, Diego Peña-Colaiocco, Visvesh S. Sathe

Proceedings of the IEEE Symposium on VLSI Circuits, 2020

Model Predictive Control of an Integrated Buck Converter for Digital SoC Domains in 65nm CMOS.

Xun Sun, Akshat Boora, Rajesh Pamula, Chi-Hsiang Huang, Diego Peña-Colaiocco, Visvesh S. Sathe

Proceedings of the IEEE Symposium on VLSI Circuits, 2020

2019

A 0.6-to-1.1V Computationally Regulated Digital LDO with 2.79-Cycle Mean Settling Time and Autonomous Runtime Gain Tracking in 65nm CMOS.

Xun Sun, Akshat Boora, Wenbing Zhang, Venkata Rajesh Pamula, Visvesh Sathe

Proceedings of the IEEE International Solid- State Circuits Conference, 2019

Computationally Enabled Total Energy Minimization Under Performance Requirements for a Voltage-Regulated 0.38-to-0.58V Microprocessor in 65nm CMOS.

Fahim ur Rahman, Rajesh Pamula, Akshat Boora, Xun Sun, Visvesh Sathe

Proceedings of the IEEE International Solid- State Circuits Conference, 2019