Alessandro Bardine

According to our database, Alessandro Bardine authored at least 14 papers between 2006 and 2014.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2014

Evaluation of Leakage Reduction Alternatives for Deep Submicron Dynamic Nonuniform Cache Architecture Caches.

Alessandro Bardine, Manuel Comparetti, Pierfrancesco Foglia, Cosimo Antonio Prete

IEEE Trans. Very Large Scale Integr. Syst., 2014

2012

A real-time configurable NURBS interpolator with bounded acceleration, jerk and chord error.

Massimiliano Annoni, Alessandro Bardine, Stefano Campanelli, Pierfrancesco Foglia, Cosimo Antonio Prete

Comput. Aided Des., 2012

2011

NUMA Caches.

Alessandro Bardine, Pierfrancesco Foglia, Cosimo Antonio Prete, Marco Solinas

Proceedings of the Encyclopedia of Parallel Computing, 2011

Energy Behaviour of NUCA Caches in CMPs.

Alessandro Bardine, Pierfrancesco Foglia, Francesco Panicucci, Marco Solinas, Julio Sahuquillo

Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

2010

Way adaptable D-NUCA caches.

Alessandro Bardine, Manuel Comparetti, Pierfrancesco Foglia, Giacomo Gabrielli, Cosimo Antonio Prete

Int. J. High Perform. Syst. Archit., 2010

NURBS interpolator with confined chord error and tangential and centripetal acceleration control.

Alessandro Bardine, Stefano Campanelli, Pierfrancesco Foglia, Cosimo Antonio Prete

Proceedings of the International Conference on Ultra Modern Telecommunications, 2010

2009

A technique for reducing power consumption of wire delay tolerant cache memories.

Alessandro Bardine

PhD thesis, 2009

Impact of on-chip network parameters on nuca cache performances.

Alessandro Bardine, Manuel Comparetti, Pierfrancesco Foglia, Giacomo Gabrielli, Cosimo Antonio Prete

IET Comput. Digit. Tech., 2009

A power-efficient migration mechanism for D-NUCA caches.

Alessandro Bardine, Manuel Comparetti, Pierfrancesco Foglia, Giacomo Gabrielli, Cosimo Antonio Prete

Proceedings of the Design, Automation and Test in Europe, 2009

2008

Performance Sensitivity of NUCA Caches to On-Chip Network Parameters.

Alessandro Bardine, Manuel Comparetti, Pierfrancesco Foglia, Giacomo Gabrielli, Cosimo Antonio Prete

Proceedings of the 20th International Symposium on Computer Architecture and High Performance Computing, 2008

Leveraging Data Promotion for Low Power D-NUCA Caches.

Alessandro Bardine, Manuel Comparetti, Pierfrancesco Foglia, Giacomo Gabrielli, Cosimo Antonio Prete, Per Stenström

Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

2007

Improving power efficiency of D-NUCA caches.

Alessandro Bardine, Pierfrancesco Foglia, Giacomo Gabrielli, Cosimo Antonio Prete, Per Stenström

SIGARCH Comput. Archit. News, 2007

Analysis of static and dynamic energy consumption in NUCA caches: initial results.

Alessandro Bardine, Pierfrancesco Foglia, Giacomo Gabrielli, Cosimo Antonio Prete

Proceedings of the 2007 workshop on MEmory performance, 2007

2006

Analysis of embedded video coder systems: a system-level approach.

Alessandro Bardine, Alessio Bechini, Pierfrancesco Foglia, Cosimo Antonio Prete

SIGARCH Comput. Archit. News, 2006