Alexander T. Ishii

According to our database, Alexander T. Ishii authored at least 6 papers between 1988 and 2012.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2012

Resonant clock design for a power-efficient high-volume x86-64 microprocessor.

Visvesh S. Sathe, Srikanth Arekapudi, Charles Ouyang, Marios C. Papaefthymiou, Alexander T. Ishii, Samuel Naffziger

Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2009

A resonant-clock 200MHz ARM926EJ-STM microcontroller.

Alexander T. Ishii, Jerry C. Kao, Visvesh S. Sathe, Marios C. Papaefthymiou

Proceedings of the 35th European Solid-State Circuits Conference, 2009

1997

Optimizing two-phase, level-clocked circuitry.

Alexander T. Ishii, Charles E. Leiserson, Marios C. Papaefthymiou

J. ACM, 1997

1995

A qualitative approach to automatic data quality judgment.

Yeona Jang, Alexander T. Ishii, Richard Y. Wang

J. Organ. Comput., 1995

1993

Retiming gated-clocks and precharged circuit structures.

Alexander T. Ishii

Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

1988

MulCh: a multi-layer channel router using one, two, and three layer partitions.

Ronald I. Greenberg, Alexander T. Ishii, Alberto L. Sangiovanni-Vincentelli

Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988