Alberto L. Sangiovanni-Vincentelli

According to our database1, Alberto L. Sangiovanni-Vincentelli
  • authored at least 593 papers between 1973 and 2017.
  • has a "Dijkstra number"2 of three.

Timeline

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Bibliography

2017
Guest Editorial Special Issue on Circuits and Systems for the Internet of Things - From Sensing to Sensemaking.
IEEE Trans. on Circuits and Systems, 2017

Secure State Estimation for Cyber-Physical Systems Under Sensor Attacks: A Satisfiability Modulo Theory Approach.
IEEE Trans. Automat. Contr., 2017

CSL4P: A Contract Specification Language for Platforms.
Systems Engineering, 2017

Systematic Testing of Convolutional Neural Networks for Autonomous Driving.
CoRR, 2017

Tunable Reactive Synthesis for Lipschitz-Bounded Systems with Temporal Logic Specifications.
CoRR, 2017

Model Predictive Control for Signal Temporal Logic Specification.
CoRR, 2017

Stochastic Assume-Guarantee Contracts for Cyber-Physical System Design Under Probabilistic Requirements.
CoRR, 2017

Turning coders into makers: the promise of embedded design generation.
Proceedings of the 1st Annual ACM Symposium on Computational Fabrication, 2017

Stochastic contracts for cyber-physical system design under probabilistic requirements.
Proceedings of the 15th ACM-IEEE International Conference on Formal Methods and Models for System Design, 2017

SMC: Satisfiability Modulo Convex Optimization.
Proceedings of the 20th International Conference on Hybrid Systems: Computation and Control, 2017

Optimized Design of a Human Intranet Network.
Proceedings of the 54th Annual Design Automation Conference, 2017

ArchEx: An Extensible Framework for the Exploration of Cyber-Physical System Architectures.
Proceedings of the 54th Annual Design Automation Conference, 2017

2016
Smart Connected Buildings Design Automation: Foundations and Trends.
Foundations and Trends in Electronic Design Automation, 2016

Designing a Cyber-Physical System for Fall Prevention by Cortico-Muscular Coupling Detection.
IEEE Design & Test, 2016

Diagnosis and Repair for Synthesis from Signal Temporal Logic Specifications.
CoRR, 2016

The ultimate IoT application: A cyber-physical system for ambient assisted living.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

SMT-Based Observer Design for Cyber-Physical Systems under Sensor Attacks.
Proceedings of the 7th ACM/IEEE International Conference on Cyber-Physical Systems, 2016

Diagnosis and Repair for Synthesis from Signal Temporal Logic Specifications.
Proceedings of the 19th International Conference on Hybrid Systems: Computation and Control, 2016

Constrained Synthesis from Component Libraries.
Proceedings of the Formal Aspects of Component Software - 13th International Conference, 2016

Scalable lazy SMT-based motion planning.
Proceedings of the 55th IEEE Conference on Decision and Control, 2016

2015
Security-Aware Design Methodology and Optimization for Automotive Systems.
ACM Trans. Design Autom. Electr. Syst., 2015

Efficient Wire Routing and Wire Sizing for Weight Minimization of Automotive Systems.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2015

Routing-Aware Design of Indoor Wireless Sensor Networks Using an Interactive Tool.
IEEE Systems Journal, 2015

A Platform-Based Design Methodology With Contracts and Related Tools for the Design of Cyber-Physical Systems.
Proceedings of the IEEE, 2015

Design Automation of Electronic Systems: Past Accomplishments and Challenges Ahead [Scanning the Issue].
Proceedings of the IEEE, 2015

Security-Aware Modeling and Efficient Mapping for CAN-Based Real-Time Distributed Automotive Systems.
Embedded Systems Letters, 2015

A Satisfiability Modulo Theory Approach to Secure State Reconstruction in Differentially Flat Systems Under Sensor Attacks.
CoRR, 2015

A Contract-based Framework for Integrated Demand Response Management in Smart Grids.
Proceedings of the 2nd ACM International Conference on Embedded Systems for Energy-Efficient Built Environments, 2015

Efficient distribution of Triggered Synchronous Block Diagrams on asynchronous platforms.
Proceedings of the 2015 International Conference on Embedded Computer Systems: Architectures, 2015

Let's get physical: Adding physical dimensions to cyber systems.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015

Buildings to Grid Integration: A Dynamic Contract Approach.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

A Mixed Discrete-Continuous Optimization Scheme for Cyber-Physical System Architecture Exploration.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

Education and training challenges in the era of Cyber-Physical Systems: beyond traditional engineering.
Proceedings of the Workshop on Embedded and Cyber-Physical Systems Education, 2015

Optimized selection of reliable and cost-effective cyber-physical system architectures.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

A conceptual model of system of systems.
Proceedings of the Second International Workshop on the Swarm at the Edge of the Cloud, 2015

Secure state reconstruction in differentially flat systems under sensor attacks using satisfiability modulo theory solving.
Proceedings of the 54th IEEE Conference on Decision and Control, 2015

Sound and complete state estimation for linear dynamical systems under sensor attacks using Satisfiability Modulo Theory solving.
Proceedings of the American Control Conference, 2015

Stochastic model predictive control design for load management system of aircraft electrical power distribution.
Proceedings of the American Control Conference, 2015

2014
A Model-Based Approach for Bridging Virtual and Physical Sensor Nodes in a Hybrid Simulation Framework.
Sensors, 2014

Optimized implementation of synchronous models on industrial LTTA systems.
Journal of Systems Architecture - Embedded Systems Design, 2014

Looking into the Crystal Ball: From Transistors to the Smart Earth.
IEEE Design & Test, 2014

The Swarm at the Edge of the Cloud.
IEEE Design & Test, 2014

Secure State Estimation Under Sensor Attacks: A Satisfiability Modulo Theory Approach.
CoRR, 2014

Communication storage optimization for static dataflow with access patterns under periodic scheduling and throughput constraint.
Computers & Electrical Engineering, 2014

A Contract-Based Methodology for Aircraft Electric Power System Design.
IEEE Access, 2014

Distributed control of a swarm of buildings connected to a smart grid: demo abstract.
Proceedings of the 1st ACM Conference on Embedded Systems for Energy-Efficient Buildings, 2014

An MDA Approach for the Generation of Communication Adapters Integrating SW and FW Components from Simulink.
Proceedings of the Model-Driven Engineering Languages and Systems, 2014

Are interface theories equivalent to contract theories?
Proceedings of the Twelfth ACM/IEEE International Conference on Formal Methods and Models for Codesign, 2014

Security-aware mapping for TDMA-based real-time distributed systems.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

Let's Get Physical: Computer Science Meets Systems.
Proceedings of the From Programs to Systems. The Systems perspective in Computing, 2014

Robust strategy synthesis for probabilistic systems applied to risk-limiting renewable-energy pricing.
Proceedings of the 2014 International Conference on Embedded Software, 2014

Contract-based design of control protocols for safety-critical cyber-physical systems.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Library-based scalable refinement checking for contract-based design.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

An Efficient Wire Routing and Wire Sizing Algorithm for Weight Minimization of Automotive Systems.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

Metronomy: A function-architecture co-simulation framework for timing verification of cyber-physical systems.
Proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis, 2014

Model predictive control with signal temporal logic specifications.
Proceedings of the 53rd IEEE Conference on Decision and Control, 2014

Model Predictive Control of regulation services from commercial buildings to the smart grid.
Proceedings of the American Control Conference, 2014

Selecting building predictive control based on model uncertainty.
Proceedings of the American Control Conference, 2014

Model predictive control approach to online computation of demand-side flexibility of commercial buildings HVAC systems for Supply Following.
Proceedings of the American Control Conference, 2014

Introduction: Modeling, Analysis and Synthesis of Embedded Software and Systems.
Proceedings of the Embedded Systems Development, From Functional Models to Implementations, 2014

2013
Duty-cycle optimization for IEEE 802.15.4 wireless sensor networks.
TOSN, 2013

metroII: A design environment for cyber-physical systems.
ACM Trans. Embedded Comput. Syst., 2013

Guest Editorial: Special Issue on System Level Design of Automotive Electronics/Software.
Embedded Systems Letters, 2013

Platform-Based Design Methodology and Modeling for Aircraft Electric Power Systems.
CoRR, 2013

Flexibility of Commercial Building HVAC Fan as Ancillary Service for Smart Grid.
CoRR, 2013

The design of dynamical observers for hybrid systems: Theory and application to an automotive control problem.
Automatica, 2013

A complexity metric for concurrent finite state machine based embedded software.
Proceedings of the 8th IEEE International Symposium on Industrial Embedded Systems, 2013

Timing analysis of process graphs with finite communication buffers.
Proceedings of the 19th IEEE Real-Time and Embedded Technology and Applications Symposium, 2013

Co-design of control algorithm and embedded platform for building HVAC systems.
Proceedings of the ACM/IEEE 4th International Conference on Cyber-Physical Systems (with CPS Week 2013), 2013

Security-aware mapping for CAN-based real-time distributed automotive systems.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

BAG: a designer-oriented integrated framework for the development of AMS circuit generators.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

Dr. Frankenstein's dream made possible: implanted electronic devices.
Proceedings of the Design, Automation and Test in Europe, 2013

Panel: the heritage of Mead & Conway: what has remained the same, what was missed, what has changed, what lies ahead.
Proceedings of the Design, Automation and Test in Europe, 2013

Industrial Cyber-Physical Systems - iCyPhy.
Proceedings of the Complex Systems Design & Management, 2013

A tool integration approach for architectural exploration of aircraft electric power systems.
Proceedings of the 1st IEEE International Conference on Cyber-Physical Systems, 2013

Optimal load management system for Aircraft Electric Power distribution.
Proceedings of the 52nd IEEE Conference on Decision and Control, 2013

Polynomial-Time Verification of PCTL Properties of MDPs with Convex Uncertainties.
Proceedings of the Computer Aided Verification - 25th International Conference, 2013

2012
Optimization of task allocation and priority assignment in hard real-time distributed systems.
ACM Trans. Embedded Comput. Syst., 2012

A 6-Bit 50-MS/s Threshold Configuring SAR ADC in 90-nm Digital CMOS.
IEEE Trans. on Circuits and Systems, 2012

Separate compilation of hierarchical real-time programs into linear-bounded Embedded Machine code.
Sci. Comput. Program., 2012

Modeling Cyber-Physical Systems.
Proceedings of the IEEE, 2012

Taming Dr. Frankenstein: Contract-Based Design for Cyber-Physical Systems.
Eur. J. Control, 2012

Development of Building Automation and Control Systems.
IEEE Design & Test of Computers, 2012

EDA meets biology! The bumpy road ahead [Perscetives].
IEEE Design & Test of Computers, 2012

Total and Peak Energy Consumption Minimization of Building HVAC Systems Using Model Predictive Control.
IEEE Design & Test of Computers, 2012

An Industrial System Engineering Process Integrating Model Driven Architecture and Model Based Design.
Proceedings of the Model Driven Engineering Languages and Systems, 2012

A routing-algorithm-aware design tool for indoor wireless sensor networks.
Proceedings of the International Conference on Computing, Networking and Communications, 2012

Cyber-Security for the Controller Area Network (CAN) Communication Protocol.
Proceedings of the 2012 ASE International Conference on Cyber Security, 2012

2011
Breath: An Adaptive Protocol for Industrial Control Applications Using Wireless Sensor Networks.
IEEE Trans. Mob. Comput., 2011

Schedule Optimization of Time-Triggered Systems Communicating Over the FlexRay Static Segment.
IEEE Trans. Industrial Informatics, 2011

Robustness in analog systems: Design techniques, methodologies and tools.
Proceedings of the Industrial Embedded Systems (SIES), 2011

Component-based design for the future.
Proceedings of the Design, Automation and Test in Europe, 2011

Are logic synthesis tools robust?
Proceedings of the 48th Design Automation Conference, 2011

2010
Optimizing the Software Architecture for Extensibility in Hard Real-time Distributed Systems.
IEEE Trans. Industrial Informatics, 2010

Using Statistical Methods to Compute the Probability Distribution of Message Response Time in Controller Area Network.
IEEE Trans. Industrial Informatics, 2010

Optimal synthesis of communication procedures in real-time synchronous reactive models.
IEEE Trans. Industrial Informatics, 2010

Synthesis of Multi-task Implementations of Simulink Models with Minimum Delays.
IEEE Trans. Industrial Informatics, 2010

Moving From Federated to Integrated Architectures in Automotive: The Role of Standards, Methods and Tools.
Proceedings of the IEEE, 2010

A Platform-Based Methodology for System-Level Mixed-Signal Design.
EURASIP J. Emb. Sys., 2010

HILAC: A framework for Hardware In the Loop simulation and multi-platform Automatic Code Generation of WSN Applications.
Proceedings of the IEEE Fifth International Symposium on Industrial Embedded Systems, 2010

A Design Flow for Building Automation and Control Systems.
Proceedings of the 31st IEEE Real-Time Systems Symposium, 2010

A 2.2mW CMOS LNA for 6-8.5GHz UWB receivers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

CalCS: SMT solving for non-linear convex constraints.
Proceedings of 10th International Conference on Formal Methods in Computer-Aided Design, 2010

All things are connected.
Proceedings of the Design, Automation and Test in Europe, 2010

Education panel: designing the always connected car of the future.
Proceedings of the 47th Design Automation Conference, 2010

2009
Minimum Energy coding in CDMA Wireless Sensor Networks.
IEEE Trans. Wireless Communications, 2009

Stochastic Analysis of Distributed Real-time Automotive Systems.
IEEE Trans. Industrial Informatics, 2009

Improving the size of communication buffers in synchronous models with time constraints.
IEEE Trans. Industrial Informatics, 2009

Challenges and Solutions in the Development of Automotive Systems.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2009

A Methodology for Constraint-Driven Synthesis of On-Chip Communications.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2009

The Tire as an Intelligent Sensor.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2009

Metamodeling: An Emerging Representation Paradigm for System-Level Design.
IEEE Design & Test of Computers, 2009

Metamodels in Europe: Languages, Tools, and Applications.
IEEE Design & Test of Computers, 2009

Runtime deadlock analysis for system level design.
Design Autom. for Emb. Sys., 2009

Statistical analysis of Controller Area Network message response times.
Proceedings of the IEEE Fourth International Symposium on Industrial Embedded Systems, 2009

Medium Access Control Analytical Modeling and Optimization in Unslotted IEEE 802.15.4 Wireless Sensor Networks.
Proceedings of the Sixth Annual IEEE Communications Society Conference on Sensor, 2009

Optimizing Extensibility in Hard Real-Time Distributed Systems.
Proceedings of the 15th IEEE Real-Time and Embedded Technology and Applications Symposium, 2009

Peer-to-peer estimation over wireless sensor networks via Lipschitz optimization.
Proceedings of the 8th International Conference on Information Processing in Sensor Networks, 2009

Automatic Code Generation for Synchronous Reactive Communication.
Proceedings of the International Conference on Embedded Software and Systems, 2009

Iterative Node Deployment in an Unknown Environment.
Proceedings of the Global Communications Conference, 2009. GLOBECOM 2009, Honolulu, Hawaii, USA, 30 November, 2009

Optimizations of an application-level protocol for enhanced dependability in FlexRay.
Proceedings of the Design, Automation and Test in Europe, 2009

UMTS MPSoC design evaluation using a system level design framework.
Proceedings of the Design, Automation and Test in Europe, 2009

Scheduling the FlexRay bus using optimization techniques.
Proceedings of the 46th Design Automation Conference, 2009

Contract-based system-level composition of analog circuits.
Proceedings of the 46th Design Automation Conference, 2009

2008
Composing heterogeneous reactive systems.
ACM Trans. Embedded Comput. Syst., 2008

An FSM Reengineering Approach to Sequential Circuit Synthesis by State Splitting.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2008

Fault-Tolerant Distributed Deployment of Embedded Control Software.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2008

Implementing Synchronous Models on Loosely Time Triggered Architectures.
IEEE Trans. Computers, 2008

A distributed minimum variance estimator for sensor networks.
IEEE Journal on Selected Areas in Communications, 2008

Schedulability Analysis of Petri Nets Based on Structural Properties.
Fundam. Inform., 2008

Is a Unified Methodology for System-Level Design Possible?
IEEE Design & Test of Computers, 2008

COSI: A Framework for the Design of Interconnection Networks.
IEEE Design & Test of Computers, 2008

The State of ESL Design [Roundtable].
IEEE Design & Test of Computers, 2008

Compositionally Progressive Solutions of Synchronous FSM Equations.
Discrete Event Dynamic Systems, 2008

Distributed Estimation over Wireless Sensor Networks with Packet Losses
CoRR, 2008

Analysis of Interference Effects in MB-OFDM UWB Systems.
Proceedings of the WCNC 2008, IEEE Wireless Communications & Networking Conference, March 31 2008, 2008

Breath: A Self-Adapting Protocol for Wireless Sensor Networks in Control and Automation.
Proceedings of the Fifth Annual IEEE Communications Society Conference on Sensor, 2008

Optimizing the Implementation of Communication in Synchronous Reactive Models.
Proceedings of the 14th IEEE Real-Time and Embedded Technology and Applications Symposium, 2008

Contract-Based Design for Computation and Verification of a Closed-Loop Hybrid System.
Proceedings of the Hybrid Systems: Computation and Control, 11th International Workshop, 2008

Duty-Cycle Optimization in Unslotted 802.15.4 Wireless Sensor Networks.
Proceedings of the Global Communications Conference, 2008. GLOBECOM 2008, New Orleans, LA, USA, 30 November, 2008

Outage-Based Rate Maximization in CDMA Wireless Networks.
Proceedings of the Global Communications Conference, 2008. GLOBECOM 2008, New Orleans, LA, USA, 30 November, 2008

Panel Session - The Future Car: Technology, Methods and Tools.
Proceedings of the Design, Automation and Test in Europe, 2008

Source-Level Timing Annotation and Simulation for a Heterogeneous Multiprocessor.
Proceedings of the Design, Automation and Test in Europe, 2008

Software Components for Reliable Automotive Systems.
Proceedings of the Design, Automation and Test in Europe, 2008

Methods, Tools and Standards for the Analysis, Evaluation and Design of Modern Automotive Architectures.
Proceedings of the Design, Automation and Test in Europe, 2008

Physical Architectures of Automotive Systems.
Proceedings of the Design, Automation and Test in Europe, 2008

Logical Reliability of Interacting Real-Time Tasks.
Proceedings of the Design, Automation and Test in Europe, 2008

Hybrid system reduction.
Proceedings of the 47th IEEE Conference on Decision and Control, 2008

Composing hybrid systems.
Proceedings of the 47th IEEE Conference on Decision and Control, 2008

A framework for creating healthcare monitoring applications using wireless body sensor networks.
Proceedings of the 3rd International ICST Conference on Body Area Networks, 2008

Approximating Behaviors in Embedded System Design.
Proceedings of the Concurrency, 2008

2007
Semantics-Preserving Design of Embedded Control Software from Synchronous Models.
IEEE Trans. Software Eng., 2007

System Level Design for Clustered Wireless Sensor Networks.
IEEE Trans. Industrial Informatics, 2007

Uniprocessor scheduling under precedence constraints for embedded systems design.
ACM Trans. Embedded Comput. Syst., 2007

Techniques for maintaining connectivity in wireless ad-hoc networks under energy constraints.
ACM Trans. Embedded Comput. Syst., 2007

Remembering Richard [Obituary, Richard A.Newton].
IEEE Trans. on CAD of Integrated Circuits and Systems, 2007

Quo Vadis, SLD? Reasoning About the Trends and Challenges of System Level Design.
Proceedings of the IEEE, 2007

Hybrid modelling and control of the common rail injection system.
Int. J. Control, 2007

Modelling and simulation techniques for highly integrated, low-power wireless sensor networks.
IET Computers & Digital Techniques, 2007

Refinement preserving approximations for the design and verification of heterogeneous systems.
Formal Methods in System Design, 2007

Embedded System Design for Automotive Applications.
IEEE Computer, 2007

FSM Encoding for BDD Representations.
Applied Mathematics and Computer Science, 2007

E2RINA: an Energy Efficient and Reliable In-Network Aggregation for Clustered Wireless Sensor Networks.
Proceedings of the IEEE Wireless Communications and Networking Conference, 2007

Reasoning about the Trends and Challenges of Engineering Design Automation.
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

Definition of Task Allocation and Priority Assignment in Hard Real-Time Distributed Systems.
Proceedings of the 28th IEEE Real-Time Systems Symposium (RTSS 2007), 2007

Optimizing End-to-End Latencies by Adaptation of the Activation Events in Distributed Automotive Systems.
Proceedings of the 13th IEEE Real-Time and Embedded Technology and Applications Symposium, 2007

Complexity Reduction for the Design of Interacting Controllers.
Proceedings of the Hybrid Systems: Computation and Control, 10th International Workshop, 2007

A new algorithm for the largest compositionally progressive solution of synchronous language equations.
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007

A communication synthesis infrastructure for heterogeneous networked control systems and its application to building automation and control.
Proceedings of the 7th ACM & IEEE International conference on Embedded software, 2007

Loosely time-triggered architectures based on communication-by-sampling.
Proceedings of the 7th ACM & IEEE International conference on Embedded software, 2007

Synthesis of task and message activation models in real-time distributed automotive systems.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

Electronics: The New Differential in the Automotive Industry.
Proceedings of the 44th Design Automation Conference, 2007

Period Optimization for Hard Real-time Distributed Automotive Systems.
Proceedings of the 44th Design Automation Conference, 2007

Fresh air: the emerging landscape of design for networked embedded systems.
Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, 2007

Automotive networks: are new busses and gateways the answer or just another challenge?
Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, 2007

2006
System level design paradigms: Platform-based design and communication synthesis.
ACM Trans. Design Autom. Electr. Syst., 2006

Complexity of two-level logic minimization.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2006

L. Embedding Mixed-Signal Design in Systems-on-Chip.
Proceedings of the IEEE, 2006

Platform based design for wireless sensor networks.
MONET, 2006

Languages and Tools for Hybrid Systems Design.
Foundations and Trends in Electronic Design Automation, 2006

A Framework for Modeling the Distributed Deployment of Synchronous Designs.
Formal Methods in System Design, 2006

Cooperative Diversity with Disconnection Constraints and Sleep Discipline for Power Control in Wireless Sensor Networks.
Proceedings of the 63rd IEEE Vehicular Technology Conference, 2006

Uniprocessor Scheduling Under Precedence Constraints.
Proceedings of the 12th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2006), 2006

Modeling and Early Performance Estimation for Network Processor Applications.
Proceedings of the Model Driven Engineering Languages and Systems, 2006

A semantic-driven synthesis flow for platform-based design.
Proceedings of the 4th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2006), 2006

Yield prediction for 3D capacitive interconnections.
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

Robust system level design with analog platforms.
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

Interchange Format for Hybrid Systems: Abstract Semantics.
Proceedings of the Hybrid Systems: Computation and Control, 9th International Workshop, 2006

Hybrid Modelling and Control of the Common Rail Injection System.
Proceedings of the Hybrid Systems: Computation and Control, 9th International Workshop, 2006

A hierarchical coordination language for interacting real-time tasks.
Proceedings of the 6th ACM & IEEE International conference on Embedded software, 2006

Communication by sampling in time-sensitive distributed systems.
Proceedings of the 6th ACM & IEEE International conference on Embedded software, 2006

Communication and co-simulation infrastructure for heterogeneous system integration.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

Is "Network" the next "Big Idea" in design?
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

Exploring trade-off's between centralized versus decentralized automotive architectures using a virtual integration environment.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

FPGA architecture characterization for system level performance analysis.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

Platform-based design of wireless sensor networks for industrial applications.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

SAT sweeping with local observability don't-cares.
Proceedings of the 43rd Design Automation Conference, 2006

Automotive electronics: steady growth for years to come!
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

Schedulability Analysis of Petri Nets Based on Structural Properties.
Proceedings of the Sixth International Conference on Application of Concurrency to System Design (ACSD 2006), 2006

Functional Model Exploration for Multimedia Applications via Algebraic Operators.
Proceedings of the Sixth International Conference on Application of Concurrency to System Design (ACSD 2006), 2006

2005
Platform-Based Design for Embedded Systems.
Proceedings of the Embedded Systems Handbook., 2005

An overview of embedded system design education at berkeley.
ACM Trans. Embedded Comput. Syst., 2005

Guidelines for a graduate curriculum on embedded software and systems.
ACM Trans. Embedded Comput. Syst., 2005

Maximizing the stability radius of a set of systems under real-time scheduling constraints.
IEEE Trans. Automat. Contr., 2005

Embedded system education: a new paradigm for engineering schools?
SIGBED Review, 2005

Efficient Solution of Optimal Control Problems Using Hybrid Systems.
SIAM J. Control and Optimization, 2005

Hybrid Control of Networked Embedded Systems.
Eur. J. Control, 2005

The importance of innovation in the economy of advanced countries.
IEEE Design & Test of Computers, 2005

An embedded system for an eye-detection sensor.
Computer Vision and Image Understanding, 2005

A formal approach to system level design: metamodels and unified design environments.
Proceedings of the 3rd ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2005), 2005

SERAN: a semi random protocol solution for clustered wireless sensor networks.
Proceedings of the IEEE 2nd International Conference on Mobile Adhoc and Sensor Systems, 2005

Enriching an analog platform for analog-to-digital converter design.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Efficient analog platform characterization through analog constraint graphs.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

Interchange Formats for Hybrid Systems: Review and Proposal.
Proceedings of the Hybrid Systems: Computation and Control, 8th International Workshop, 2005

Controller Synthesis on Non-uniform and Uncertain Discrete-Time Domains.
Proceedings of the Hybrid Systems: Computation and Control, 8th International Workshop, 2005

JPEG Encoding on the Intel MXP5800: A Platform-Based Design Case Study.
Proceedings of the 2005 3rd Workshop on Embedded Systems for Real-Time Multimedia, 2005

A formal approach to fault tree synthesis for the analysis of distributed fault tolerant systems.
Proceedings of the EMSOFT 2005, 2005

A structural approach to quasi-static schedulability analysis of communicating concurrent programs.
Proceedings of the EMSOFT 2005, 2005

Rialto: a bridge between description and implementation of control algorithms for wireless sensor networks.
Proceedings of the EMSOFT 2005, 2005

Tag machines.
Proceedings of the EMSOFT 2005, 2005

Efficient embedded software design with synchronous models.
Proceedings of the EMSOFT 2005, 2005

Fault Tolerant Data Flow Modeling Using the Generic Modeling Environment.
Proceedings of the 12th IEEE International Conference on the Engineering of Computer-Based Systems (ECBS 2005), 2005

Integrated Electronics in the Car and the Design Chain Evolution or Revolution?
Proceedings of the 2005 Design, 2005

Correct-by-Construction Transformations across Design Environments for Model-Based Embedded Software Development.
Proceedings of the 2005 Design, 2005

Simulation based deadlock analysis for system level designs.
Proceedings of the 42nd Design Automation Conference, 2005

Mixed signal design space exploration through analog platforms.
Proceedings of the 42nd Design Automation Conference, 2005

Grand challenges in embedded systems.
Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2005

A low-power mixed-signal baseband system design for wireless sensor networks.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

FSM re-engineering and its application in low power state encoding.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

Extensible and Scalable Time Triggered Scheduling.
Proceedings of the Fifth International Conference on Application of Concurrency to System Design (ACSD 2005), 2005

Platform-Based and Derivative Design.
Proceedings of the Industrial Information Technology Handbook, 2005

2004
SPFD-based wire removal in standard-cell and network-of-PLA circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2004

Logic Synthesis for Manufacturability.
IEEE Design & Test of Computers, 2004

Adaptive sleep discipline for energy conservation and robustness in dense sensor networks.
Proceedings of IEEE International Conference on Communications, 2004

Synthesis for Idle Speed Control of an Automotive Engine.
Proceedings of the Hybrid Systems: Computation and Control, 7th International Workshop, 2004

Separation of concerns: overhead in modeling and efficient simulation techniques.
Proceedings of the EMSOFT 2004, 2004

Conservative approximations for heterogeneous design.
Proceedings of the EMSOFT 2004, 2004

Heterogeneous reactive systems modeling: capturing causality and the correctness of loosely time-triggered architectures (LTTA).
Proceedings of the EMSOFT 2004, 2004

Fault-Tolerant Deployment of Embedded Software for Cost-Sensitive Real-Time Feedback-Control Applications.
Proceedings of the 2004 Design, 2004

Synthesis for Manufacturability: A Sanity Check.
Proceedings of the 2004 Design, 2004

Microarchitecture Development via Metropolis Successive Platform Refinement.
Proceedings of the 2004 Design, 2004

A Methodology for System-Level Analog Design Space Exploration.
Proceedings of the 2004 Design, 2004

Benefits and challenges for platform-based design.
Proceedings of the 41th Design Automation Conference, 2004

The best of both worlds: the efficient asynchronous implementation of synchronous specifications.
Proceedings of the 41th Design Automation Conference, 2004

2003
Platform-based embedded software design and system integration for autonomous vehicles.
Proceedings of the IEEE, 2003

Guest Editors' Introduction: Trends and Directions in Microelectronics.
IEEE Micro, 2003

Electronic-System Design in the Automobile Industry.
IEEE Micro, 2003

The Tides of EDA.
IEEE Design & Test of Computers, 2003

DAC Turns 40!
IEEE Design & Test of Computers, 2003

Metropolis: An Integrated Electronic System Design Environment.
IEEE Computer, 2003

Individual cylinder characteristic estimation for a spark injection engine.
Automatica, 2003

Combining Retiming and Recycling to Optimize the Performance of Synchronous Circuits.
Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, 2003

Low power coordination in wireless ad-hoc networks.
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003

Structural Detection of Symmetries in Boolean Functions.
Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003

Efficient Synthesis of Networks On Chip.
Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003

A Methodology for the Computation of an Upper Bound on Nose Current Spectrum of CMOS Switching Activity.
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003

Causality and Scheduling Constraints in Heterogeneous Reactive Systems Modeling.
Proceedings of the Formal Methods for Components and Objects, 2003

Heterogeneous Reactive Systems Modeling and Correct-by-Construction Deployment.
Proceedings of the Embedded Software, Third International Conference, 2003

Equisolvability of Series vs. Controller's Topology in Synchronous Language Equations.
Proceedings of the 2003 Design, 2003

System Level Design of Embedded Controllers: Knock Detection, A Case Study in the Automotive Domain.
Proceedings of the 2003 Design, 2003

A tool for describing and evaluating hierarchical real-time bus scheduling policies.
Proceedings of the 40th Design Automation Conference, 2003

Support vector machines for analog circuit performance representation.
Proceedings of the 40th Design Automation Conference, 2003

On-chip communication design: roadblocks and avenues.
Proceedings of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2003

Fault-tolerant platforms for automotive safety-critical applications.
Proceedings of the International Conference on Compilers, 2003

2002
Coping with Latency in SOC Design.
IEEE Micro, 2002

Formula-Dependent Equivalence for Compositional CTL Model Checking.
Formal Methods in System Design, 2002

Equisolvability of Series vs. Controller's Topology in Synchronous Language Equations.
IWLS, 2002

Automotive Virtual Integration Platforms: Why's, What's, and How's.
Proceedings of the 20th International Conference on Computer Design (ICCD 2002), 2002

Models of IP's for Automotive Virtual Integration Platforms.
Proceedings of the 20th International Conference on Computer Design (ICCD 2002), 2002

Convertibility verification and converter synthesis: two faces of the same coin.
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

Proximity templates for modeling of skin and proximity effects on packages and high frequency interconnect.
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

Synthesis of Robust Control Systems under Resource Constraints.
Proceedings of the Hybrid Systems: Computation and Control, 5th International Workshop, 2002

Design of Observers for Hybrid Systems.
Proceedings of the Hybrid Systems: Computation and Control, 5th International Workshop, 2002

An Enhanced POLIS Framework for Fast Exploration and Implementation of I/O Subsystems on CSoC Platforms.
Proceedings of the Field-Programmable Logic and Applications, 2002

Platform-Based Embedded Software Design for Multi-vehicle Multi-modal Systems.
Proceedings of the Embedded Software, Second International Conference, 2002

Compositional Modeling in Metropolis.
Proceedings of the Embedded Software, Second International Conference, 2002

Constraint-driven communication synthesis.
Proceedings of the 39th Design Automation Conference, 2002

HW/SW partitioning and code generation of embedded control applications on a reconfigurable architecture platform.
Proceedings of the Tenth International Symposium on Hardware/Software Codesign, 2002

Concurrent execution semantics and sequential simulation algorithms for the metropolis meta-model.
Proceedings of the Tenth International Symposium on Hardware/Software Codesign, 2002

Modeling and Designing Heterogeneous Systems.
Proceedings of the Concurrency and Hardware Design, Advances in Petri Nets, 2002

2001
Synchronous approach to the functional equivalence of embeddedsystem implementations.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2001

Theory of latency-insensitive design.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2001

Model matching for finite-state machines.
IEEE Trans. Automat. Contr., 2001

Platform-Based Design and Software Design Methodology for Embedded Systems.
IEEE Design & Test of Computers, 2001

Embedded Software Design for Real-Time Applications.
Proceedings of the 22nd IEEE Real-Time Systems Symposium (RTSS 2001), 2001

Scheduling Reactive Task Graphs in Embedded Control Systems.
Proceedings of the 7th IEEE Real-Time Technology and Applications Symposium (RTAS 2001), 30 May, 2001

Modeling of Substrate Noise Injected by Digital Libraries.
Proceedings of the 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 2001

Solution of Parallel Language Equations for Logic Synthesis.
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

System-Level Power/Performance Analysis of Portable Multimedia Systems Communicating over Wireless Channels.
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

Addressing the Timing Closure Problem by Integrating Logic Optimization and Placement.
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

Techniques for Including Dielectrics when Extracting Passive Low-Order Models of High Speed Interconnect.
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

Hybrid Systems Applications: An Oxymoron?
Proceedings of the Hybrid Systems: Computation and Control, 4th International Workshop, 2001

Optimal Control Using Bisimulations: Implementation.
Proceedings of the Hybrid Systems: Computation and Control, 4th International Workshop, 2001

Constraints specification at higher levels of abstraction.
Proceedings of the Sixth IEEE International High-Level Design Validation and Test Workshop 2001, 2001

Using Multiple Levels of Abstractions in Embedded Software Design.
Proceedings of the Embedded Software, First International Workshop, 2001

Analysis of DSP-Kernel Software by Implicit Cache Simulation.
Proceedings of the 8th IEEE International Conference on Engineering of Computer-Based Systems (ECBS 2001), 2001

Design methodology for PicoRadio networks.
Proceedings of the Conference on Design, Automation and Test in Europe, 2001

Addressing the System-on-a-Chip Interconnect Woes Through Communication-Based Design.
Proceedings of the 38th Design Automation Conference, 2001

Using Conduction Modes Basis Functions for Efficient Electromagnetic Analysis of On-Chip and Off-Chip Interconnect.
Proceedings of the 38th Design Automation Conference, 2001

A vision for embedded software.
Proceedings of the 2001 International Conference on Compilers, 2001

Overcoming Heterophobia: Modeling Concurrency in Heterogeneous Systems.
Proceedings of the 2nd International Conference on Application of Concurrency to System Design (ACSD 2001), 2001

2000
System-level design: orthogonalization of concerns andplatform-based design.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2000

Negative thinking in branch-and-bound: the case of unate covering.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2000

Sequential synthesis using S1S.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2000

A new procedure for exact ring closure.
Journal of Computational Chemistry, 2000

Formal Models for Embedded System Design.
IEEE Design & Test of Computers, 2000

A Case Study in Embedded Systems Design: An Engine Control Unit.
Design Autom. for Emb. Sys., 2000

Platform-Based Design: A Path to Efficient Design Re-Use.
Proceedings of the 1st International Symposium on Quality of Electronic Design (ISQED 2000), 2000

Binary and Multi-Valued SPFD-Based Wire Removal in PLA Networks.
Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000

Cross-Talk Immune VLSI Design Using a Network of PLAs Embedded in a Regular Layout Fabric.
Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided Design, 2000

Designing wireless protocols: methodology and applications.
Proceedings of the IEEE International Conference on Acoustics, 2000

Models of Computation and Simulation of Hybrid Systems.
Proceedings of the Hybrid Systems: Computation and Control, Third International Workshop, 2000

Theory of Optimal Control Using Bisimulations.
Proceedings of the Hybrid Systems: Computation and Control, Third International Workshop, 2000

Maximal Safe Set Computation for Idle Speed Control of an Automotive Engine.
Proceedings of the Hybrid Systems: Computation and Control, Third International Workshop, 2000

Free MDD-Based Software Optimization Techniques for Embedded Systems.
Proceedings of the 2000 Design, 2000

HW/SW Codesign of an Engine Management System.
Proceedings of the 2000 Design, 2000

Task scheduling with RT constraints.
Proceedings of the 37th Conference on Design Automation, 2000

Embedded systems education (panel abstract).
Proceedings of the 37th Conference on Design Automation, 2000

Efficient methods for embedded system design space exploration.
Proceedings of the 37th Conference on Design Automation, 2000

Task generation and compile-time scheduling for mixed data-control embedded software.
Proceedings of the 37th Conference on Design Automation, 2000

Performance analysis and optimization of latency insensitive systems.
Proceedings of the 37th Conference on Design Automation, 2000

Formal Models for Communication-Based Design.
Proceedings of the CONCUR 2000, 2000

Task response time optimization using cost-based operation motion.
Proceedings of the Eighth International Workshop on Hardware/Software Codesign, 2000

Wireless protocols design: challenges and opportunities.
Proceedings of the Eighth International Workshop on Hardware/Software Codesign, 2000

1999
Modeling digital substrate noise injection in mixed-signal IC's.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1999

Substrate optimization based on semi-analytical techniques.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1999

Synthesis of software programs for embedded control applications.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1999

Hybrid control in automotive applications: the cut-off control.
Automatica, 1999

Sequential Multi-Valued Network Simplification using Redundancy Removal.
Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999

Analysis of the quantization noise effects on the SQNR behaviour in analog to digital conversion.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

Aura II: Combining Negative Thinking and Branch-and-Bound in Unate Covering Problems.
Proceedings of the VLSI: Systems on a Chip, 1999

System Design: Traditional Concepts and New Paradigms.
Proceedings of the IEEE International Conference On Computer Design, 1999

Noise analysis of non-autonomous radio frequency circuits.
Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999

A methodology for correct-by-construction latency insensitive design.
Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999

Fast Hardware-Software Co-simulation Using VHDL Models.
Proceedings of the 1999 Design, 1999

A Novel VLSI Layout Fabric for Deep Sub-Micron Applications.
Proceedings of the 36th Conference on Design Automation, 1999

HW and SW in Embedded System Design: Loveboat, Shipwreck, or Ships Passing in the Night.
Proceedings of the 36th Conference on Design Automation, 1999

On Thermal Effects in Deep Sub-Micron VLSI Interconnects.
Proceedings of the 36th Conference on Design Automation, 1999

A compilation-based software estimation scheme for hardware/software co-simulation.
Proceedings of the Seventh International Workshop on Hardware/Software Codesign, 1999

Designing digital video systems: modeling and scheduling.
Proceedings of the Seventh International Workshop on Hardware/Software Codesign, 1999

Latency Insensitive Protocols.
Proceedings of the Computer Aided Verification, 11th International Conference, 1999

Fast Instruction Cache Simulation Strategies in a Hardware/Software Co-Design Environment.
Proceedings of the 1999 Conference on Asia South Pacific Design Automation, 1999

Quasi-Static Scheduling of Embedded Software Using Equal Conflict Nets.
Proceedings of the Application and Theory of Petri Nets 1999, 1999

1998
Modeling reactive systems in Java.
ACM Trans. Design Autom. Electr. Syst., 1998

A framework for comparing models of computation.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1998

Theory and algorithms for face hypercube embedding.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1998

Exact Minimization of Binary Decision Diagrams Using Implicit Techniques.
IEEE Trans. Computers, 1998

Scheduling for Embedded Real-Time Systems.
IEEE Design & Test of Computers, 1998

Rapid-Prototyping of Embedded Systems via Reprogrammable Devices.
Design Autom. for Emb. Sys., 1998

Intellectual Property Re-use in Embedded System Co-design: An Industrial Case Study.
Proceedings of the 11th International Symposium on System Synthesis, 1998

Wireplanning in logic synthesis.
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998

Hybrid Control for Automotive Engine Management: The Cut-Off Case.
Proceedings of the Hybrid Systems: Computation and Control, First International Workshop, 1998

An Exact Input Encoding Algorithm for BDDs Representing FSMs.
Proceedings of the 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 1998

Automatic Synthesis of Interfaces Between Incompatible Protocols.
Proceedings of the 35th Conference on Design Automation, 1998

A Case Study in Embedded System Design: An Engine Control Unit.
Proceedings of the 35th Conference on Design Automation, 1998

Modeling reactive systems in Java.
Proceedings of the Sixth International Workshop on Hardware/Software Codesign, 1998

Software timing analysis using HW/SW cosimulation and instruction set simulator.
Proceedings of the Sixth International Workshop on Hardware/Software Codesign, 1998

A case study on modeling shared memory access effects during performance analysis of HW/SW systems.
Proceedings of the Sixth International Workshop on Hardware/Software Codesign, 1998

1997
Symbolic two-level minimization.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1997

Explicit and implicit algorithms for binate covering problems.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1997

Theory and algorithms for state minimization of nondeterministic FSMs.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1997

Implicit computation of compatible sets for state minimization of ISFSMs.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1997

Formal Verification of Combinational Circuit.
Proceedings of the 10th International Conference on VLSI Design (VLSI Design 1997), 1997

Dynamic Reordering in a Breadth-First Manipulation Based BDD Package: Challenges and Solutions.
Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

A Survey of Techniques for Formal Verification of Combinational Circuits.
Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

Reachability analysis using partitioned-ROBDDs.
Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

Sequential optimisation without state space exploration.
Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

A fast and robust exact algorithm for face embedding.
Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

Negative thinking by incremental problem solving: application to unate covering.
Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

Trace driven logic synthesis - application to power minimization.
Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

Logic synthesis for large pass transistor circuits.
Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

Interface-Based Design.
Proceedings of the 34st Conference on Design Automation, 1997

Fast Hardware/Software Co-Simulation for Virtual Prototyping and Trade-Off Analysis.
Proceedings of the 34st Conference on Design Automation, 1997

Schedule Validation for Embedded Reactive Real-Time Systems.
Proceedings of the 34st Conference on Design Automation, 1997

Modeling micro-controller peripherals for high-level co-simulation and synthesis.
Proceedings of the Fifth International Workshop on Hardware/Software Codesign, 1997

Automatic Generation of a Real-Time Operating System for Embedded Systems.
Proceedings of the Fifth International Workshop on Hardware/Software Codesign, 1997

Trade-off evaluation in embedded system design via co-simulation.
Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, 1997

1996
Combinational test generation using satisfiability.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1996

Automation of IC layout with analog constraints.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1996

Valid clock frequencies and their computation in wavepipelined circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1996

Time-domain non-Monte Carlo noise simulation for nonlinear dynamic circuits with arbitrary excitations.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1996

Using the Minimum Description Length Principle to Infer Reduced Ordered Decision Graphs.
Machine Learning, 1996

A Unified Signal Transition Graph Model for Asynchronous Control Circuit Synthesis.
Formal Methods in System Design, 1996

A case study in computer-aided co-design of embedded controllers.
Design Autom. for Emb. Sys., 1996

Optimization of analog IC test structures.
Proceedings of the 14th IEEE VLSI Test Symposium (VTS'96), April 28, 1996

A study of composition schemes for mixed apply/compose based construction of ROBDDs.
Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996

Rapid-Prototyping of Embedded Systems via Reprogrammable Devices.
Proceedings of the Seventh IEEE International Workshop on Rapid System Prototyping (RSP '96), 1996

Binary decision diagrams on network of workstation.
Proceedings of the 1996 International Conference on Computer Design (ICCD '96), 1996

A video driver system designed using a top-down, constraint-driven methodology.
ICCAD, 1996

Partitioned ROBDDs - a compact, canonical and efficiently manipulable representation for Boolean functions.
ICCAD, 1996

Comparing models of computation.
ICCAD, 1996

Digital sensitivity: predicting signal interaction using functional analysis.
ICCAD, 1996

Hierarchical statistical characterization of mixed-signal circuits using behavioral modeling.
ICCAD, 1996

Generalized constraint generation in the presence of non-deterministic parasitics.
ICCAD, 1996

Semi-analytical techniques for substrate characterization in the design of mixed-signal ICs.
ICCAD, 1996

Compact and complete test set generation for multiple stuck-faults.
ICCAD, 1996

Decomposition Techniques for Efficient ROBDD Construction.
Proceedings of the Formal Methods in Computer-Aided Design, First International Conference, 1996


Efficient Software Performance Estimation Methods for Hardware/Software Codesign.
Proceedings of the 33st Conference on Design Automation, 1996

Verification of Electronic Systems.
Proceedings of the 33st Conference on Design Automation, 1996

High Performance BDD Package By Exploiting Memory Hiercharchy.
Proceedings of the 33st Conference on Design Automation, 1996

Use of Sensitivities and Generalized Substrate Models in Mixed-Signal IC Design.
Proceedings of the 33st Conference on Design Automation, 1996

Engineering Change in a Non-Deterministic FSM Setting.
Proceedings of the 33st Conference on Design Automation, 1996

Formal Verification of Embedded Systems based on CFSM Networks.
Proceedings of the 33st Conference on Design Automation, 1996


1995
Verification of Nyquist data converters using behavioral simulation.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1995

An efficient heuristic procedure for solving the state assignment problem for event-based specifications.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1995

Synthesis of hazard-free asynchronous circuits with bounded wire delays.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1995

Delay fault coverage, test set size, and performance trade-offs.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1995

Synthesis for testability techniques for asynchronous circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1995

Automatic generation of analytical models for interconnect capacitances.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1995

An Iterative Approach to Verification of Real-Time Systems.
Formal Methods in System Design, 1995

Functional clock schedule optimization.
Proceedings of the 8th International Conference on VLSI Design (VLSI Design 1995), 1995

Inferring Reduced Ordered Decision Graphs of Minimum Description Length.
Proceedings of the Machine Learning, 1995

Implicit state minimization of non-deterministic FSMs.
Proceedings of the 1995 International Conference on Computer Design (ICCD '95), 1995

Fast discrete function evaluation using decision diagrams.
Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995

Sequential synthesis using S1S.
Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995

Decomposition of logic functions for minimum transition activity.
Proceedings of the 1995 European Design and Test Conference, 1995

Timed Shannon Circuits: A Power-Efficient Design Style and Synthesis Tool.
Proceedings of the 32st Conference on Design Automation, 1995

Synthesis of Software Programs for Embedded Control Applications.
Proceedings of the 32st Conference on Design Automation, 1995

1994
Linear programming for hazard elimination in asynchronous circuits.
VLSI Signal Processing, 1994

Satisfaction of input and output encoding constraints.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1994

Circuit structure relations to redundancy and delay.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1994

Minimizing production test time to detect faults in analog circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1994

Hardware-software codesign of embedded systems.
IEEE Micro, 1994

A parallel iterative linear solver for solving irregular grid semiconductor device matrices.
Proceedings of the Proceedings Supercomputing '94, 1994

Techniques for crosstalk avoidance in the physical design of high-performance digital systems.
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

Testing of analog systems using behavioral models and optimal experimental design techniques.
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

Measurement and modeling of MOS transistor current mismatch in analog IC's.
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

Time-domain non-Monte Carlo noise simulation for nonlinear dynamic circuits with arbitrary excitations.
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

Iterative algorithms for formal verification of embedded real-time systems.
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

Equivalences for Fair Kripke Structures.
Proceedings of the Automata, Languages and Programming, 21st International Colloquium, 1994

Heuristic Minimization of BDDs Using Don't Cares.
Proceedings of the 31st Conference on Design Automation, 1994

Performance Optimization Using Exact Sensitization.
Proceedings of the 31st Conference on Design Automation, 1994

Optimum Functional Decomposition Using Encoding.
Proceedings of the 31st Conference on Design Automation, 1994

DA Algorithms in Non-EDA Applications: How Universal Are Our Techniques? (Panel).
Proceedings of the 31st Conference on Design Automation, 1994

Exact Minimum Cycle Times for Finite State Machines.
Proceedings of the 31st Conference on Design Automation, 1994

A Fully Implicit Algorithm for Exact State Minimization.
Proceedings of the 31st Conference on Design Automation, 1994

Panel: Complex System Verification: The Challenge Ahead.
Proceedings of the 31st Conference on Design Automation, 1994

Simultaneous Placement and Module Optimization of Analog IC's.
Proceedings of the 31st Conference on Design Automation, 1994

Chain Closure: A Problem in Molecular CAD.
Proceedings of the 31st Conference on Design Automation, 1994

HSIS: A BDD-Based Environment for Formal Verification.
Proceedings of the 31st Conference on Design Automation, 1994

A case study in computer-aided codesign of embedded controllers.
Proceedings of the Third International Workshop on Hardware/Software Codesign, 1994

On the Automatic Computation of Network Invariants.
Proceedings of the Computer Aided Verification, 6th International Conference, 1994

1993
ESPRESSO-SIGNATURE: a new exact minimizer for logic functions.
IEEE Trans. VLSI Syst., 1993

Performance optimization of pipelined logic circuits using peripheral retiming and resynthesis.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1993

Area routing for analog layout.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1993

Constraint-based channel routing for analog and mixed analog/digital circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1993

Automatic generation of parasitic constraints for performance-constrained physical design of analog circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1993

Automated design management using traces.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1993

Two-Level Minimization of Multivalued Functions with Large Offsets.
IEEE Trans. Computers, 1993

Automated synthesis of asynchronous interface circuits.
Microprocessors and Microsystems - Embedded Hardware Design, 1993

Minimization of Logic Functions Using Essential Signature Sets.
Proceedings of the Sixth International Conference on VLSI Design, 1993

Learning Complex Boolean Functions: Algorithms and Applications.
Proceedings of the Advances in Neural Information Processing Systems 6, 1993

Automated Synthesis of Asynchronous Interface Circuits.
Proceedings of the Asynchronous Design Methodologies, Proceedings of the IFIP WG10.5 Working Conference on Asynchronous Design Methodologies, Manchester, UK, 31 March, 1993

Some Results on the Complexity of Boolean Functions for Table Look Up Architectures.
Proceedings of the Proceedings 1993 International Conference on Computer Design: VLSI in Computers & Processors, 1993

Minimum padding to satisfy short path constraints.
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

Cube-packing and two-level minimization.
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

Nyquist data converter testing and yield analysis using behavioral simulation.
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

Generalized constraint generation for analog circuit design.
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

An algorithm for improving partitions of pin-limited multi-chip systems.
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

Dynamic variable reordering for BDD minimization.
Proceedings of the European Design Automation Conference 1993, 1993

Resynthesis of Multi-Phase Pipelines.
Proceedings of the 30th Design Automation Conference. Dallas, 1993

Sequential Synthesis for Table Look Up Programmable Gate Arrays.
Proceedings of the 30th Design Automation Conference. Dallas, 1993

Espresso-Signature: A New Exact Minimizer for Logic Functions.
Proceedings of the 30th Design Automation Conference. Dallas, 1993

Analog System Verification in the Presence of Parasitics Using Behavioral Simulation.
Proceedings of the 30th Design Automation Conference. Dallas, 1993

Delay Fault Coverage and Performance Tradeoffs.
Proceedings of the 30th Design Automation Conference. Dallas, 1993

Circuit Delay Models and Their Exact Computation Using Timed Boolean Functions.
Proceedings of the 30th Design Automation Conference. Dallas, 1993

A Verification Technique for Gated Clock.
Proceedings of the 30th Design Automation Conference. Dallas, 1993

An Iterative Approach to Language Containment.
Proceedings of the Computer Aided Verification, 5th International Conference, 1993

1992
Symbolic minimization of multilevel logic and the input encoding problem.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1992

Constructive Induction Using a Non-Greedy Strategy for Feature Selection.
Proceedings of the Ninth International Workshop on Machine Learning (ML 1992), 1992

Sequential Circuit Design Using Synthesis and Optimization.
Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1992

Linear Programming for Optimum Hazard Elimination in Asynchronous Circuits.
Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1992

A unified signal transition graph model for asynchronous control circuit synthesis.
Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992

Graph algorithms for clock schedule optimization.
Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992

Behavioral simulation for noise in mixed-mode sampled-data systems.
Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992

Valid clocking in wavepipelined circuits.
Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992

Automatic compositional minimization in CTL model checking.
Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992

Some Considerations on Field-Programmable Gate Arrays and Their Impact on System Design.
Proceedings of the Field-Programmable Gate Arrays: Architectures and Tools for Rapid Prototyping, Second International Workshop on Field-Programmable Logic and Applications, Vienna, Austria, August 31, 1992

Boolean matching in logic synthesis.
Proceedings of the conference on European design automation, 1992

An efficient methodology for symbolic compaction of analog IC's with multiple symmetry constraints.
Proceedings of the conference on European design automation, 1992

Communication based logic partitioning.
Proceedings of the conference on European design automation, 1992

On the Temporal Equivalence of Sequential Circuits.
Proceedings of the 29th Design Automation Conference, 1992

Circuit Structure Relations to Redundancy and Delay: The KMS Algorithm Revisited.
Proceedings of the 29th Design Automation Conference, 1992

Equivalence of Robust Delay-Fault and Single Stuck-Fault Test Generation.
Proceedings of the 29th Design Automation Conference, 1992

An Improved Synthesis Algorithm for Multiplexor-Based PGA's.
Proceedings of the 29th Design Automation Conference, 1992

Solving the State Assignment Problem for Signal Transition Graphs.
Proceedings of the 29th Design Automation Conference, 1992

Automatic Reduction in CTL Compositional Model Checking.
Proceedings of the Computer Aided Verification, Fourth International Workshop, 1992

A Verification Strategy for Timing-Constrained Systems.
Proceedings of the Computer Aided Verification, Fourth International Workshop, 1992

1991
A massively parallel algorithm for three-dimensional device simulation.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1991

Retiming and resynthesis: optimizing sequential networks with combinational techniques.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1991

Reduced offsets for minimization of binary-valued functions.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1991

A macromodeling algorithm for analog circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1991

Editor's Foreword.
Algorithmica, 1991

A Theoretical Framework for Simulated Annealing.
Algorithmica, 1991

Learning Concepts by Synthesizing Minimal Threshold Gate Networks.
Proceedings of the Eighth International Workshop (ML91), 1991

Retiming of Circuits with Single Phase Transparent Latches.
Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991

LSAT-An Algorithm for the Synthesis of Two Level Threshold Gate Networks.
Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991

Performance Directed Synthesis for Table Look Up Programmable Gate Arrays.
Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991

Improved Logic Synthesis Algorithms for Table Look Up Architectures.
Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991

On Clustering for Minimum Delay/Area.
Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991

Timing Analysis and Delay-Fault Test Generation using Path-Recursive Functions.
Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991

Performance Enhancement through the Generalized Bypass Transform.
Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991

A Behavioral Representation for Nyquist Rate A/D Converters.
Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991

Synthesis for Testability Techniques for Asynchronous Circuits.
Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991

Testability Solutions: Who Really Wants Them? (Panel Abstract).
Proceedings of the 28th Design Automation Conference, 1991

A Framework for Satisfying Input and Output Encoding Constraints.
Proceedings of the 28th Design Automation Conference, 1991

Algorithms for Synthesis of Hazard-Free Asynchronous Circuits.
Proceedings of the 28th Design Automation Conference, 1991

1990
NOVA: state assignment of finite state machines for optimal two-level logic implementation.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1990

'Zone-refining' techniques for IC layout compaction.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1990

Irredundant sequential machines via optimal logic synthesis.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1990

Implicit State Enumeration of Finite State Machines Using BDDs.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

Timing Optimization with Testability Considerations.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

Optimal Test Set Design for Analog Circuits.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

Computing Parametric Yield Accurately and Efficiently.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

Performance Optimization of Pipelined Circuits.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

A Routing Methodology for Analog Integrated Circuits.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

MIS-MV: Optimization of Multi-Level Logic with Multiple-Valued Inputs.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

CADICS - Cyclic Analog-to-Digital Converter Synthesis.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

Constraint-Based Channel Routing for Analog and Mixed Analog/Digital Circuits.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

A Heuristic Algorithm for the Fanout Problem.
Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990

Testing Strategies for the 1990's (Panel Abstract).
Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990

Logic Synthesis for Programmable Gate Arrays.
Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990

Reduced Offsets for Two-Level Multi-Valued Logic Minimization.
Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990

Constraint Generation for Routing Analog Circuits.
Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990

Design Management Based on Design Traces.
Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990

1989
Comments on 'Simulation of nonlinear circuits in the frequency domain' [with reply].
IEEE Trans. on CAD of Integrated Circuits and Systems, 1989

Logic verification algorithms and their parallel implementation.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1989

A synthesis and optimization procedure for fully and easily testable sequential machines.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1989

Design Methods and Tools for Application Specific Integrated Circuits.
IFIP Congress, 1989

Timing Analysis in a Logic Synthesis Environment.
Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989

NOVA: State Assignment of Finite State Machines for Optimal Two-level Logic Implementations.
Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989

Multi-level Logic Simplification Using Don't Cares and Filters.
Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989

ORCA a Sea-of-Gates Place and Route System.
Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989

1988
DELIGHT.SPICE: an optimization-based system for the design of integrated circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1988

Test generation for sequential circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1988

Three-dimensional capacitance evaluation on a Connection Machine.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1988

MUSTANG: state assignment of finite state machines targeting multilevel logic implementations.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1988

A new aggregation technique for the solution of large systems of algebraic equations [IC simulation].
IEEE Trans. on CAD of Integrated Circuits and Systems, 1988

Techniques for multilayer channel routing.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1988

Multi-level logic minimization using implicit don't cares.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1988

Efficient Parallel Learning Algorithms for Neural Networks.
Proceedings of the Advances in Neural Information Processing Systems 1, 1988

Optimal Logic Synthesis and Testability : Two Sides of the Same Coin.
Proceedings of the Proceedings International Test Conference 1988, 1988

An Incomplete Scan Design Approach to Test Generation for Sequential Machines.
Proceedings of the Proceedings International Test Conference 1988, 1988

Synthesis and Optimization Procedures for Fully and Easily Testable Sequential Machines.
Proceedings of the Proceedings International Test Conference 1988, 1988

Timing optimization of combinational logic.
Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988

ECSTASY: a new environment for IC design optimization.
Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988

Logic verification using binary decision diagrams in a logic synthesis environment.
Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988

A modified approach to two-level logic minimization.
Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988

A band relaxation algorithm for reliable and parallelizable circuit simulation.
Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988

An envelope-following method for the efficient transient simulation of switching power and filter circuits.
Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988

MulCh: a multi-layer channel router using one, two, and three layer partitions.
Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988

Boolean decomposition in multi-level logic optimization.
Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988

1987
A Detailed Router Based on Incremental Routing Modifications: Mighty.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1987

Multiple-Valued Minimization for PLA Optimization.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1987

A Parallel Simulated Annealing Algorithm for the Placement of Macro-Cells.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1987

MIS: A Multiple-Level Logic Optimization System.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1987

Circuit Simulation on the Connection Machine.
Proceedings of the 24th ACM/IEEE Design Automation Conference. Miami Beach, FL, June 28, 1987

Logic Verification Algorithms and Their Parallel Implementation.
Proceedings of the 24th ACM/IEEE Design Automation Conference. Miami Beach, FL, June 28, 1987

1986
PLATYPUS: A PLA Test Pattern Generation Tool.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1986

Models for a New Profit-Based Methodology for Statistical Design of Integrated Circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1986

Correction to "Optimal State Assignment for Finite State Machines".
IEEE Trans. on CAD of Integrated Circuits and Systems, 1986

Simulation of Nonlinear Circuits in the Frequency Domain.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1986

Computer-Aided Design for VLSI Circuits.
IEEE Computer, 1986

New Front-End and Line Justification Algorithm for Automatic Test Generation.
Proceedings of the Proceedings International Test Conference 1986, 1986

PROTEUS : A Logic Verification System for Combinational Circuits.
Proceedings of the Proceedings International Test Conference 1986, 1986

Highlights of VLSI Research at Berkeley.
Proceedings of the Fall Joint Computer Conference, November 2-6, 1986, Dallas, Texas, USA, 1986

Two-dimensional compaction by "zone refining".
Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, NV, June, 1986., 1986

TimberWolf3.2: a new standard cell placement and global routing package.
Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, NV, June, 1986., 1986

Floor planning systems (panel session).
Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, NV, June, 1986., 1986

Mixed-level fault coverage estimation.
Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, NV, June, 1986., 1986

Chameleon: a new multi-layer channel router.
Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, NV, June, 1986., 1986

1985
A New Symbolic Channel Router: YACR2.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1985

Optimal State Assignment for Finite State Machines.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1985

PLATYPUS: a PLA test pattern generation tool.
Proceedings of the 22nd ACM/IEEE conference on Design automation, 1985

1984
A Computational Approach for the Diagnosability of Dynamical Circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1984

Relaxation-Based Electrical Simulation.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1984

Correction to "Multiple Constrained Folding of Programmable Logic Arrays: Theory and Applications".
IEEE Trans. on CAD of Integrated Circuits and Systems, 1984

1983
Solution of piecewise-linear ordinary differential equations using waveform relaxation and laplace transforms.
IEEE Trans. Systems, Man, and Cybernetics, 1983

Multiple Constrained Folding of Programmable Logic Arrays: Theory and Applications.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1983

Symmetric Displacement Algorithms for the Timing Analysis of Large Scale Circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1983

PLEASURE: a computer program for simple/multiple constrained/unconstrained folding of Programmable Logic Arrays.
Proceedings of the 20th Design Automation Conference, 1983

1982
The Waveform Relaxation Method for Time-Domain Analysis of Large Scale Integrated Circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1982

An Algorithm for Optimal PLA Folding.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1982

Computer-aided design via optimization : A review.
Automatica, 1982

VICTOR : A Fast VLSI Testability Analysis Program.
Proceedings of the Proceedings International Test Conference 1982, 1982

Relax: A new circuit for large scale MOS integrated circuits.
Proceedings of the 19th Design Automation Conference, 1982

Techniques for programmable logic array folding.
Proceedings of the 19th Design Automation Conference, 1982

1981
Diagnosability of Nonlinear Circuits and Systems - Part I: The dc Case.
IEEE Trans. Computers, 1981

Diagnosability of Nonlinear Circuits and Systems - Part II: Dynamical Systems.
IEEE Trans. Computers, 1981

1978
A new shortest path updating algorithm.
Networks, 1978

1973
State-Space Approach in Problem-solving Optimization.
Proceedings of the 5th Conference on Optimization Techniques, 1973


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