Amir Fathi

According to our database1, Amir Fathi authored at least 9 papers between 2012 and 2020.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2020
Very Fast, High-Performance 5-2 and 7-2 Compressors in CMOS Process for Rapid Parallel Accumulations.
IEEE Trans. Very Large Scale Integr. Syst., 2020

2019
Generalized Method of Analog Circuit Characteristic Function Analysis.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

High-speed, low power, and dead zone improved phase frequency detector.
IET Circuits Devices Syst., 2019

2018
A low-power, fully programmable membership function generator using both transconductance and current modes.
Fuzzy Sets Syst., 2018

2015
High Speed Min/Max Architecture Based on a Novel Comparator in 0.18-μm CMOS Process.
J. Circuits Syst. Comput., 2015

2012
A Novel and Very Fast 4-2 Compressor for High Speed Arithmetic Operations.
IEICE Trans. Electron., 2012

Ultra High Speed Modified Booth Encoding Architecture for High Speed Parallel Accumulations.
IEICE Trans. Electron., 2012

Low latency, glitch-free booth encoder-decoder for high speed multipliers.
IEICE Electron. Express, 2012

CMOS implementation of a fast 4-2 compressor for parallel accumulations.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012


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