Amir H. Salek

According to our database1, Amir H. Salek authored at least 7 papers between 1997 and 2002.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2002
Hierarchical buffered routing tree generation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002

1999
An integrated logical and physical design flow for deep submicron circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

MERLIN: Semi-Order-Independent Hierarchical Buffered Routing Tree Generation Using Local Neighborhood Search.
Proceedings of the 36th Conference on Design Automation, 1999

1998
A simultaneous routing tree construction and fanout optimization algorithm.
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998

A DSM Design Flow: Putting Floorplanning, Technology-Napping, and Gate-Placement Together.
Proceedings of the 35th Conference on Design Automation, 1998

An Integrated Flow for Technology Remapping and Placement of Sub-half-micron Circuits.
Proceedings of the ASP-DAC '98, 1998

1997
An exact solution to simultaneous technology mapping and linear placement problem.
Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997


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