Amit Singh

Affiliations:
  • University of California, Santa Barbara, USA
  • Xilinx, Inc., San Jose, CA, USA


According to our database1, Amit Singh authored at least 11 papers between 1999 and 2003.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2003
PITIA: an FPGA for throughput-intensive applications.
IEEE Trans. Very Large Scale Integr. Syst., 2003

2002
Efficient circuit clustering for area and power reduction in FPGAs.
ACM Trans. Design Autom. Electr. Syst., 2002

FPGA interconnect planning.
Proceedings of the Fourth IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2002), 2002

Efficient circuit clustering for area and power reduction in FPGAs.
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2002

2001
Interconnect complexity-aware FPGA placement using Rent's rule.
Proceedings of the Third IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2001), March 31, 2001

Interconnect Resource-Aware Placement for Hierarchical FPGAs.
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

Interconnect pipelining in a throughput-intensive FPGA architecture.
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2001

A Global Routing Technique for Wave-Steering Design Methodology.
Proceedings of the Euromicro Symposium on Digital Systems Design 2001 (Euro-DSD 2001), 2001

Latency and Latch Count Minimization in Wave Steered Circuits.
Proceedings of the 38th Design Automation Conference, 2001

2000
A novel high throughput reconfigurable FPGA architecture.
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2000

1999
Circuit clustering using graph coloring.
Proceedings of the 1999 International Symposium on Physical Design, 1999


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