Anantha Chandrakasan

According to our database1, Anantha Chandrakasan authored at least 334 papers between 1992 and 2020.

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Awards

IEEE Fellow

IEEE Fellow 2004, "For contributions to the design of energy efficient integrated circuits and systems.".

Timeline

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Bibliography

2020
SonicPACT: An Ultrasonic Ranging Method for the Private Automated Contact Tracing (PACT) Protocol.
CoRR, 2020

Rethinking Empirical Evaluation of Adversarial Robustness Using First-Order Attack Methods.
CoRR, 2020

Self-reconfigurable micro-implants for cross-tissue wireless and batteryless connectivity.
Proceedings of the MobiCom '20: The 26th Annual International Conference on Mobile Computing and Networking, 2020

29.8 THzID: A 1.6mm2 Package-Less Cryptographic Identification Tag with Backscattering and Beam-Steering at 260GHz.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

Accelerating Post-Quantum Cryptography using an Energy-Efficient TLS Crypto-Processor.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Efficient Post-Quantum TLS Handshakes using Identity-Based Key Exchange from Lattices.
Proceedings of the 2020 IEEE International Conference on Communications, 2020

Modular Optoelectronic System for Wireless, Programmable Neuromodulation During Free Behavior.
Proceedings of the 42nd Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2020

A Low-Power Dual-Factor Authentication Unit for Secure Implantable Devices.
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020

S2ADC: A 12-bit, 1.25MS/s Secure SAR ADC with Power Side-Channel Attack Resistance.
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020

2019
Sapphire: A Configurable Crypto-Processor for Post-Quantum Lattice-based Protocols.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2019

CONV-SRAM: An Energy-Efficient SRAM With In-Memory Dot-Product Computation for Low-Power Convolutional Neural Networks.
IEEE J. Solid State Circuits, 2019

An Energy-Efficient Reconfigurable DTLS Cryptographic Engine for Securing Internet-of-Things Applications.
IEEE J. Solid State Circuits, 2019

Sapphire: A Configurable Crypto-Processor for Post-Quantum Lattice-based Protocols (Extended Version).
IACR Cryptol. ePrint Arch., 2019

A Silicon MEMS EM vibration energy harvester.
CoRR, 2019

An Energy-Efficient Configurable Lattice Cryptography Processor for the Quantum-Secure Internet of Things.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

SHARC: Self-Healing Analog with RRAM and CNFETs.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

Flexible Low Power CNN Accelerator for Edge Computing with Weight Tuning.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019

2018
A Fully Integrated Energy-Efficient H.265/HEVC Decoder With eDRAM for Wearable Devices.
IEEE J. Solid State Circuits, 2018

A Low-Power Speech Recognizer and Voice Activity Detector Using Deep Neural Networks.
IEEE J. Solid State Circuits, 2018

An Actively Detuned Wireless Power Receiver With Public Key Cryptographic Authentication and Dynamic Power Allocation.
IEEE J. Solid State Circuits, 2018

GAZELLE: A Low Latency Framework for Secure Neural Network Inference.
IACR Cryptol. ePrint Arch., 2018

Conv-RAM: An energy-efficient SRAM with embedded convolution computation for low-power CNN-based machine learning applications.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

An energy-efficient reconfigurable DTLS cryptographic engine for End-to-End security in iot applications.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

Recode then LSB-first SAR ADC for Reducing Energy and Bit-cycles.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Energy-Efficient Speaker Identification with Low-Precision Networks.
Proceedings of the 2018 IEEE International Conference on Acoustics, 2018

EMG-based Real Time Facial Gesture Recognition for Stress Monitoring.
Proceedings of the 40th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2018

A low-power integrated power converter for an electromagnetic vibration energy harvester with 150 mV-AC cold startup, frequency tuning, and 50 Hz AC-to-DC conversion.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018

A -80dBm BLE-compliant, FSK wake-up receiver with system and within-bit dutycycling for scalable power and latency.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018

2017
Harnessing Partial Packets in Wireless Networks: Throughput and Energy Benefits.
IEEE Trans. Wirel. Commun., 2017

A Random Linear Network Coding Accelerator in a 2.4GHz Transmitter for IoT Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

A Noise-Efficient 36 nV/ $\surd $ Hz Chopper Amplifier Using an Inverter-Based 0.2-V Supply Input Stage.
IEEE J. Solid State Circuits, 2017

An Energy-Scalable Accelerator for Blind Image Deblurring.
IEEE J. Solid State Circuits, 2017

A Wide Dynamic Range Buck Converter With Sub-nW Quiescent Power.
IEEE J. Solid State Circuits, 2017

A Nonvolatile Flip-Flop-Enabled Cryptographic Wireless Authentication Tag With Per-Query Key Update and Power-Glitch Attack Countermeasures.
IEEE J. Solid State Circuits, 2017

Energy-Efficient Reconfigurable SRAM: Reducing Read Power Through Data Statistics.
IEEE J. Solid State Circuits, 2017

14.4 A scalable speech recognizer with deep-neural-network acoustic models and voice-activated power gating.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

10.8 A Buck converter with 240pW quiescent power, 92% peak efficiency and a 2×10<sup>6</sup> dynamic range.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

21.1 Nanowatt circuit interface to whole-cell bacterial sensors.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

21.8 An actively detuned wireless power receiver with public key cryptographic authentication and dynamic power allocation.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

Session 1 overview: Plenary Session.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

eeDTLS: Energy-Efficient Datagram Transport Layer Security for the Internet of Things.
Proceedings of the 2017 IEEE Global Communications Conference, 2017

0.3 V ultra-low power sensor interface for EMG.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017

Single-BAW multi-channel transmitter with low power and fast start-up time.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017

A 25 mV-startup cold start system with on-chip magnetics for thermal energy harvesting.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017

Low-Power On-Chip Network Providing Guaranteed Services for Snoopy Coherent and Artificial Neural Network Systems.
Proceedings of the 54th Annual Design Automation Conference, 2017

An offset-cancelling four-phase voltage sense amplifier for resistive memories in 14nm CMOS.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

2016
A +10 dBm BLE Transmitter With Sub-400 pW Leakage for Ultra-Low Duty Cycles.
IEEE J. Solid State Circuits, 2016

An RC Oscillator With Comparator Offset Cancellation.
IEEE J. Solid State Circuits, 2016

Ultra Low-Energy Relaxation Oscillator With 230 fJ/cycle Efficiency.
IEEE J. Solid State Circuits, 2016

A 10 nW-1µW Power Management IC With Integrated Battery Management and Self-Startup for Energy Harvesting Applications.
IEEE J. Solid State Circuits, 2016

Towards High-Performance Bufferless NoCs with SCEPTER.
IEEE Comput. Archit. Lett., 2016

An ASIC for Energy-Scalable, Low-Power Digital Ultrasound Beamforming.
Proceedings of the 2016 IEEE International Workshop on Signal Processing Systems, 2016

5.4 A sub-µW 36nV/√Hz chopper amplifier for sensors using a noise-efficient inverter-based 0.2V-supply input stage.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

16.2 A Keccak-based wireless authentication tag with per-query key update and power-glitch attack countermeasures.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

24.1 A 0.6V 8mW 3D vision processor for a navigation device for the visually impaired.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

Session 1 overview: Plenary session.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

Memory-Efficient Modeling and Search Techniques for Hardware ASR Decoders.
Proceedings of the Interspeech 2016, 2016

A ZVS resonant receiver with maximum efficiency tracking for device-to-device wireless charging.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016

A 0.36V 128Kb 6T SRAM with energy-efficient dynamic body-biasing and output data prediction in 28nm FDSOI.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016

Enabling simultaneously bi-directional TSV signaling for energy and area efficient 3D-ICs.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Quest for high-performance bufferless NoCs with single-cycle express paths and self-learning throttling.
Proceedings of the 53rd Annual Design Automation Conference, 2016

Reconfigurable, conditional pre-charge SRAM: Lowering read power by leveraging data statistics.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016

Analog-digital partitioning and coupling in 3D-IC for RF applications.
Proceedings of the 2016 IEEE International 3D Systems Integration Conference, 2016

2015
A Fully-Implantable Cochlear Implant SoC With Piezoelectric Middle-Ear Sensor and Arbitrary Waveform Neural Stimulation.
IEEE J. Solid State Circuits, 2015

A 6 mW, 5, 000-Word Real-Time Speech Recognizer Using WFST Models.
IEEE J. Solid State Circuits, 2015

A 28 nm FDSOI Integrated Reconfigurable Switched-Capacitor Based Step-Up DC-DC Converter With 88% Peak Efficiency.
IEEE J. Solid State Circuits, 2015

Caraoke: An E-Toll Transponder Network for Smart Cities.
Comput. Commun. Rev., 2015

4.2 pW timer for heavily duty-cycled systems.
Proceedings of the Symposium on VLSI Circuits, 2015

Solar energy harvesting system with integrated battery management and startup using single inductor and 3.2nW quiescent power.
Proceedings of the Symposium on VLSI Circuits, 2015

13.7 A +10dBm 2.4GHz transmitter with sub-400pW leakage and 43.7% system efficiency.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

Session 1 overview: Plenary session.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

AdaptCast: An integrated source to transmission scheme for wireless sensor networks.
Proceedings of the 2015 IEEE International Conference on Communications, 2015

2014
Decoder Hardware Architecture for HEVC.
Proceedings of the High Efficiency Video Coding (HEVC), Algorithms and Architectures, 2014

Memory-Hierarchical and Mode-Adaptive HEVC Intra Prediction Architecture for Quad Full HD Video Decoding.
IEEE Trans. Very Large Scale Integr. Syst., 2014

A 10 bit SAR ADC With Data-Dependent Energy Reduction Using LSB-First Successive Approximation.
IEEE J. Solid State Circuits, 2014

A 249-Mpixel/s HEVC Video-Decoder Chip for 4K Ultra-HD Applications.
IEEE J. Solid State Circuits, 2014

A 128 Kbit SRAM With an Embedded Energy Monitoring Circuit and Sense-Amplifier Offset Compensation Using Body Biasing.
IEEE J. Solid State Circuits, 2014

Application-Specific SRAM Design Using Output Prediction to Reduce Bit-Line Switching Activity and Statistically Gated Sense Amplifiers for Up to 1.9× Lower Energy/Access.
IEEE J. Solid State Circuits, 2014

Correction to "Reconfigurable Processor for Energy-Efficient Computational Photography".
IEEE J. Solid State Circuits, 2014

A 3.4-pJ FeRAM-Enabled D Flip-Flop in 0.13-µm CMOS for Nonvolatile Processing in Digital Systems.
IEEE J. Solid State Circuits, 2014

A Sub-nW 2.4 GHz Transmitter for Low Data-Rate Sensing Applications.
IEEE J. Solid State Circuits, 2014

A 1 GS/s 10b 18.9 mW Time-Interleaved SAR ADC With Background Timing Skew Calibration.
IEEE J. Solid State Circuits, 2014

A Scalable, 2.9 mW, 1 Mb/s e-Textiles Body Area Network Transceiver With Remotely-Powered Nodes and Bi-Directional Data Communication.
IEEE J. Solid State Circuits, 2014

A 1.1 nW Energy-Harvesting System with 544 pW Quiescent Power for Next-Generation Implants.
IEEE J. Solid State Circuits, 2014

A self-aware processor SoC using energy monitors integrated into power converters for self-adaptation.
Proceedings of the Symposium on VLSI Circuits, 2014

18.2 A fully-implantable cochlear implant SoC with piezoelectric middle-ear sensor and energy-efficient stimulation in 0.18μm HVCMOS.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

11.3 A 10b 0.6nW SAR ADC with data-dependent energy savings using LSB-first successive approximation.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

27.2 A 6mW 5K-Word real-time speech recognizer using WFST models.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

22.4 A 1GS/s 10b 18.9mW time-interleaved SAR ADC with background timing-skew calibration.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

23.2 A 1.1nW energy harvesting system with 544pW quiescent power for next-generation implants.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

27.4 A 0.75-million-point fourier-transform chip for frequency-sparse signals.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

A bipolar ±40 MV self-starting boost converter with transformer reuse for thermoelectric energy harvesting.
Proceedings of the International Symposium on Low Power Electronics and Design, 2014

SCORPIO: A 36-core research chip demonstrating snoopy coherence on a scalable mesh NoC with in-network ordering.
Proceedings of the ACM/IEEE 41st International Symposium on Computer Architecture, 2014

Energy and area-efficient hardware implementation of HEVC inverse transform and dequantization.
Proceedings of the 2014 IEEE International Conference on Image Processing, 2014

PRAC: Exploiting partial packets without cross-layer or feedback information.
Proceedings of the IEEE International Conference on Communications, 2014

SCORPIO: 36-core shared memory processor demonstrating snoopy coherence on a mesh interconnect.
Proceedings of the 2014 IEEE Hot Chips 26 Symposium (HCS), 2014

A 28nm FDSOI integrated reconfigurable switched-capacitor based step-up DC-DC converter with 88% peak efficiency.
Proceedings of the ESSCIRC 2014, 2014

Energy Savings via Harnessing Partial Packets in Body Area Networks.
Proceedings of the 9th International Conference on Body Area Networks, 2014

2013
Technique for Efficient Evaluation of SRAM Timing Failure.
IEEE Trans. Very Large Scale Integr. Syst., 2013

Rapid Wireless Capacitor Charging Using a Multi-Tapped Inductively-Coupled Secondary Coil.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013

Energy-Aware Design of Compressed Sensing Systems for Wireless Sensors Under Performance and Reliability Constraints.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013

Cost and Coding Efficient Motion Estimation Design Considerations for High Efficiency Video Coding (HEVC) Standard.
IEEE J. Sel. Top. Signal Process., 2013

An 8-Channel Scalable EEG Acquisition SoC With Patient-Specific Seizure Classification and Recording Processor.
IEEE J. Solid State Circuits, 2013

A Resolution-Reconfigurable 5-to-10-Bit 0.4-to-1 V Power Scalable SAR ADC for Sensor Applications.
IEEE J. Solid State Circuits, 2013

Reconfigurable Processor for Energy-Efficient Computational Photography.
IEEE J. Solid State Circuits, 2013

A 2.4 GHz Multi-Channel FBAR-based Transmitter With an Integrated Pulse-Shaping Power Amplifier.
IEEE J. Solid State Circuits, 2013

Ultrasonic Imaging Transceiver Design for CMUT: A Three-Level 30-Vpp Pulse-Shaping Pulser With Improved Efficiency and a Noise-Optimized Receiver.
IEEE J. Solid State Circuits, 2013

Single-Cycle Multihop Asynchronous Repeated Traversal: A SMART Future for Reconfigurable On-Chip Networks.
Computer, 2013

HEVC interpolation filter architecture for quad full HD decoding.
Proceedings of the 2013 Visual Communications and Image Processing, 2013

EP1: Antiques from the innovations attic.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

An SRAM using output prediction to reduce BL-switching activity and statistically-gated SA for up to 1.9× reduction in energy/access.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

Reconfigurable processor for energy-scalable computational photography.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

A 3.4pJ FeRAM-enabled D flip-flop in 0.13µm CMOS for nonvolatile processing in digital systems.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

A 120nW 18.5kHz RC oscillator with comparator offset cancellation for ±0.25% temperature stability.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

A 249Mpixel/s HEVC video-decoder chip for Quad Full HD applications.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

A 93% efficiency reconfigurable switched-capacitor DC-DC converter using on-chip ferroelectric capacitors.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

A scalable 2.9mW 1Mb/s eTextiles body area network transceiver with remotely powered sensors and bi-directional data communication.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

Session 1 overview: Plenary session.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

90.6% efficient 11MHz 22W LED driver using GaN FETs and burst-mode controller with 0.96 power factor.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

Experimental study of the interplay of channel and network coding in low power sensor applications.
Proceedings of IEEE International Conference on Communications, 2013

40.4fJ/bit/mm low-swing on-chip signaling with self-resetting logic repeaters embedded within a mesh NoC in 45nm SOI CMOS.
Proceedings of the Design, Automation and Test in Europe, 2013

SMART: a single-cycle reconfigurable NoC for SoC applications.
Proceedings of the Design, Automation and Test in Europe, 2013

2012
Joint Algorithm-Architecture Optimization of CABAC.
J. Signal Process. Syst., 2012

The Effect of Random Dopant Fluctuations on Logic Timing at Low Voltage.
IEEE Trans. Very Large Scale Integr. Syst., 2012

Design of Low-Voltage Digital Building Blocks and ADCs for Energy-Efficient Systems.
IEEE Trans. Circuits Syst. II Express Briefs, 2012

A Highly Parallel and Scalable CABAC Decoder for Next Generation Video Coding.
IEEE J. Solid State Circuits, 2012

Quad Full-HD Transform Engine for Dual-Standard Low-Power Video Coding.
IEEE J. Solid State Circuits, 2012

A Low-Voltage 1 Mb FRAM in 0.13 µm CMOS Featuring Time-to-Digital Sensing for Expanded Operating Margin.
IEEE J. Solid State Circuits, 2012

A 12 b 5-to-50 MS/s 0.5-to-1 V Voltage Scalable Zero-Crossing Based Pipelined ADC.
IEEE J. Solid State Circuits, 2012

A 28 nm 0.6 V Low Power DSP for Mobile Applications.
IEEE J. Solid State Circuits, 2012

Design and Analysis of a Hardware-Efficient Compressed Sensing Architecture for Data Compression in Wireless Sensors.
IEEE J. Solid State Circuits, 2012

Platform Architecture for Solar, Thermal, and Vibration Energy Combining With MPPT and Single Inductor.
IEEE J. Solid State Circuits, 2012

Guest Editorial Emerging Circuits and Systems Techniques for Ultra-Low Power Body Sensor Networks.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2012

A 0.6V 2.9µW mixed-signal front-end for ECG monitoring.
Proceedings of the Symposium on VLSI Circuits, 2012

A 440pJ/bit 1Mb/s 2.4GHz multi-channel FBAR-based TX and an integrated pulse-shaping PA.
Proceedings of the Symposium on VLSI Circuits, 2012

An 8-channel scalable EEG acquisition SoC with fully integrated patient-specific seizure classification and recording processor.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

A 330nA energy-harvesting charger with battery management for solar and thermoelectric energy harvesting.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

Session 1 overview: Plenary session.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

Memory cost vs. coding efficiency trade-offs for HEVC motion estimation engine.
Proceedings of the 19th IEEE International Conference on Image Processing, 2012

Hardware-aware motion estimation search algorithm development for high-efficiency video coding (HEVC) standard.
Proceedings of the 19th IEEE International Conference on Image Processing, 2012

Approaching the theoretical limits of a mesh NoC with a 16-node chip prototype in 45nm SOI.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

Self-aware computing in the Angstrom processor.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011
Reduction of Variation-Induced Energy Overhead in Multi-Core Processors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

A Battery-Less Thermoelectric Energy Harvesting Interface Circuit With 35 mV Startup Voltage.
IEEE J. Solid State Circuits, 2011

A 512kb 8T SRAM Macro Operating Down to 0.57 V With an AC-Coupled Sense Amplifier and Embedded Data-Retention-Voltage Sensor in 45 nm SOI CMOS.
IEEE J. Solid State Circuits, 2011

A Supply-Rail-Coupled eTextiles Transceiver for Body-Area Networks.
IEEE J. Solid State Circuits, 2011

Zero-Crossing Detector Based Reconfigurable Analog System.
IEEE J. Solid State Circuits, 2011

An Energy-Efficient Biomedical Signal Processing Platform.
IEEE J. Solid State Circuits, 2011

A Biomedical Sensor Interface With a sinc Filter and Interference Cancellation.
IEEE J. Solid State Circuits, 2011

20 µ A to 100 mA DC-DC Converter With 2.8-4.2 V Battery Supply for Portable Applications in 45 nm CMOS.
IEEE J. Solid State Circuits, 2011

Challenges and Directions for Low-Voltage SRAM.
IEEE Des. Test Comput., 2011

Cell Library Characterization at Low Voltage Using Non-linear Operating Point Analysis of Local Variations.
Proceedings of the VLSI Design 2011: 24th International Conference on VLSI Design, 2011

Energy-Aware Hardware Implementation of Network Coding.
Proceedings of the NETWORKING 2011 Workshops - International IFIP TC 6 Workshops, PE-CRN, 2011

A resolution-reconfigurable 5-to-10b 0.4-to-1V power scalable SAR ADC.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

A 28nm high-density 6T SRAM with optimized peripheral-assist circuits for operation down to 0.6V.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

A low-voltage 1Mb FeRAM in 0.13μm CMOS featuring time-to-digital sensing for expanded operating margin in scaled CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

A 28nm 0.6V low-power DSP for mobile applications.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

20μA to 100mA DC-DC converter with 2.8 to 4.2V battery supply for portable applications in 45nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

Joint algorithm-architecture optimization of CABAC to increase speed and reduce area cost.
Proceedings of the IEEE International Conference on Acoustics, 2011

A 12b 5-to-50MS/s 0.5-to-1V voltage scalable zero-crossing based pipelined ADC.
Proceedings of the 37th European Solid-State Circuits Conference, 2011

A 10 pJ/cycle ultra-low-voltage 32-bit microprocessor system-on-chip.
Proceedings of the 37th European Solid-State Circuits Conference, 2011

2010
Technologies for Ultradynamic Voltage Scaling.
Proc. IEEE, 2010

A Micro-Power EEG Acquisition SoC With Integrated Feature Extraction Processor for a Chronic Seizure Detection System.
IEEE J. Solid State Circuits, 2010

A Fully-Integrated Switched-Capacitor Step-Down DC-DC Converter With Digital Capacitance Modulation in 45 nm CMOS.
IEEE J. Solid State Circuits, 2010

An Efficient Piezoelectric Energy Harvesting Interface Circuit Using a Bias-Flip Rectifier and Shared Inductor.
IEEE J. Solid State Circuits, 2010

A Low-Voltage Energy-Sampling IR-UWB Digital Baseband Employing Quadratic Correlation.
IEEE J. Solid State Circuits, 2010

All-Digital Circuits for Measurement of Spatial Variation in Digital Circuits.
IEEE J. Solid State Circuits, 2010

A Pulsed UWB Receiver SoC for Insect Motion Control.
IEEE J. Solid State Circuits, 2010

A 0.16mm<sup>2</sup> completely on-chip switched-capacitor DC-DC converter using digital capacitance modulation for LDO replacement in 45nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

A batteryless thermoelectric energy-harvesting interface circuit with 35mV startup voltage.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

A 512kb 8T SRAM macro operating down to 0.57V with an AC-coupled sense amplifier and embedded data-retention-voltage sensor in 45nm SOI CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

A 110µW 10Mb/s etextiles transceiver for body area networks with remote battery power.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

Non-linear Operating Point Statistical Analysis for Local Variations in logic timing at low voltage.
Proceedings of the Design, Automation and Test in Europe, 2010

Loop flattening & spherical sampling: Highly efficient model reduction techniques for SRAM yield analysis.
Proceedings of the Design, Automation and Test in Europe, 2010

A 0.077 to 0.168 nJ/bit/iteration scalable 3GPP LTE turbo decoder with an adaptive sub-block parallel scheme and an embedded DVFS engine.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

A low-power area-efficient switching scheme for charge-sharing DACs in SAR ADCs.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

A signal-agnostic compressed sensing acquisition system for wireless and implantable sensors.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

2009
Multicore Processing and Efficient On-Chip Caching for H.264 and Future Video Decoders.
IEEE Trans. Circuits Syst. Video Technol., 2009

Low-Power Impulse UWB Architectures and Circuits.
Proc. IEEE, 2009

A High-Density 45 nm SRAM Using Small-Signal Non-Strobed Regenerative Sensing.
IEEE J. Solid State Circuits, 2009

A 0.7-V 1.8-mW H.264/AVC 720p Video Decoder.
IEEE J. Solid State Circuits, 2009

A Reconfigurable 8T Ultra-Dynamic Voltage Scalable (U-DVS) SRAM in 65 nm CMOS.
IEEE J. Solid State Circuits, 2009

An Energy-Efficient All-Digital UWB Transmitter Employing Dual Capacitively-Coupled Pulse-Shaping Drivers.
IEEE J. Solid State Circuits, 2009

A 65 nm Sub-V<sub>t</sub> Microcontroller With Integrated SRAM and Switched Capacitor DC-DC Converter.
IEEE J. Solid State Circuits, 2009

A 6-bit, 0.2 V to 0.9 V Highly Digital Flash ADC With Comparator Redundancy.
IEEE J. Solid State Circuits, 2009

A 32-µW 1.83-kS/s Carbon Nanotube Chemical Sensor System.
IEEE J. Solid State Circuits, 2009

A 350 µW CMOS MSK Transmitter and 400 µW OOK Super-Regenerative Receiver for Medical Implant Communications.
IEEE J. Solid State Circuits, 2009

A 0.55V 16Mb/s 1.6mW non-coherent IR-UWB digital baseband with ±1ns synchronization accuracy.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

A pulsed UWB receiver SoC for insect motion control.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

Next generation energy scavenging systems.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

A high throughput CABAC algorithm using syntax element partitioning.
Proceedings of the International Conference on Image Processing, 2009

An oscilloscope array for high-impedance device characterization.
Proceedings of the 35th European Solid-State Circuits Conference, 2009

2008
Traceback-Based Optimizations for Maximum a Posteriori Decoding Algorithms.
J. Signal Process. Syst., 2008

A 256 kb 65 nm 8T Subthreshold SRAM Employing Sense-Amplifier Redundancy.
IEEE J. Solid State Circuits, 2008

Minimum Energy Tracking Loop With Embedded DC-DC Converter Enabling Ultra-Low-Voltage Operation Down to 250 mV in 65 nm CMOS.
IEEE J. Solid State Circuits, 2008

Highly Interleaved 5-bit, 250-MSample/s, 1.2-mW ADC With Redundant Channels in 65-nm CMOS.
IEEE J. Solid State Circuits, 2008

A High-Density 45nm SRAM Using Small-Signal Non-Strobed Regenerative Sensing.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

A 65nm Sub-Vt Microcontroller with Integrated SRAM and Switched-Capacitor DC-DC Converter.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

Highly Interleaved 5b 250MS/s ADC with Redundant Channels in 65nm CMOS.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

A 6b 0.2-to-0.9V Highly Digital Flash ADC with Comparator Redundancy.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

Ultra-low-power UWB for sensor network applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Parallel CABAC for low power video coding.
Proceedings of the International Conference on Image Processing, 2008

Breaking the simulation barrier: SRAM evaluation through norm minimization.
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

A reconfigurable 65nm SRAM achieving voltage scalability from 0.25-1.2V and performance scalability from 20kHz-200MHz.
Proceedings of the ESSCIRC 2008, 2008

The mixed signal optimum energy point: voltage and parallelism.
Proceedings of the 45th Design Automation Conference, 2008

The design of a low power carbon nanotube chemical sensor system.
Proceedings of the 45th Design Automation Conference, 2008

2007
An Ultra Low Energy 12-bit Rate-Resolution Scalable SAR ADC for Wireless Sensor Nodes.
IEEE J. Solid State Circuits, 2007

A 2.5 nJ/bit 0.65 V Pulsed UWB Receiver in 90 nm CMOS.
IEEE J. Solid State Circuits, 2007

500-MS/s 5-bit ADC in 65-nm CMOS With Split Capacitor Array DAC.
IEEE J. Solid State Circuits, 2007

Dual Time-Interleaved Successive Approximation Register ADCs for an Ultra-Wideband Receiver.
IEEE J. Solid State Circuits, 2007

An Energy-Efficient OOK Transceiver for Wireless Sensor Networks.
IEEE J. Solid State Circuits, 2007

A 256-kb 65-nm Sub-threshold SRAM Design for Ultra-Low-Voltage Operation.
IEEE J. Solid State Circuits, 2007

Scaling and evaluation of carbon nanotube interconnects for VLSI applications.
Proceedings of the 2nd Internationa ICST Conference on Nano-Networks, 2007

A 47pJ/pulse 3.1-to-5GHz All-Digital UWB Transmitter in 90nm CMOS.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

A 65nm 8T Sub-Vt SRAM Employing Sense-Amplifier Redundancy.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

Minimum Energy Tracking Loop with Embedded DC-DC Converter Delivering Voltages down to 250mV in 65nm CMOS.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

A 2.5nJ/b 0.65V 3-to-5GHz Subbanded UWB Receiver in 90nm CMOS.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

A Test-Structure to Efficiently Study Threshold-Voltage Variation in Large MOSFET Arrays.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

A 0.4-V UWB baseband processor.
Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007

Delay-Based BPSK for Pulsed-UWB Communication.
Proceedings of the IEEE International Conference on Acoustics, 2007

A Low Power Carbon Nanotube Chemical Sensor System.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2006
Sub-threshold Design for Ultra Low-Power Systems
Series on Integrated Circuits and Systems, Springer, ISBN: 978-0-387-34501-7, 2006

A 25µW 100kS/s 12b ADC for wireless micro-sensor applications.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

A 256kb Sub-threshold SRAM in 65nm CMOS.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

Variation-driven device sizing for minimum energy sub-threshold circuits.
Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006

Sub-threshold design: the challenges of minimizing circuit energy.
Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006

An Energy Efficient Sub-Threshold Baseband Processor Architecture for Pulsed Ultra-Wideband Communications.
Proceedings of the 2006 IEEE International Conference on Acoustics Speech and Signal Processing, 2006

2005
A/D Precision Requirements for Digital Ultra-Wideband Radio Receivers.
J. VLSI Signal Process., 2005

Design Considerations for Ultra-Low Energy Wireless Microsensor Nodes.
IEEE Trans. Computers, 2005

DSPs for energy harvesting sensors: applications and architectures.
IEEE Pervasive Comput., 2005

System design considerations for ultra-wideband communication.
IEEE Commun. Mag., 2005

A 3-D FPGA wire resource prediction model validated using a 3-D placement and routing tool.
Proceedings of the Seventh International Workshop on System-Level Interconnect Prediction (SLIP 2005), 2005

An energy-efficient charge recycling approach for a SAR converter with capacitive DAC.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Architectures for energy-aware impulse UWB communications.
Proceedings of the 2005 IEEE International Conference on Acoustics, 2005

Energy Efficiency of the IEEE 802.15.4 Standard in Dense Wireless Microsensor Networks: Modeling and Improvement Perspectives.
Proceedings of the 2005 Design, 2005

Direct Conversion Pulsed UWB Transceiver Architecture.
Proceedings of the 2005 Design, 2005

A BiCMOS ultra-wideband 3.1-10.6GHz front-end.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

A highly-integrated CMOS analog baseband transceiver with 180MSPS 13b pipelined CMOS ADC and dual 12b DACs.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

Dual scalable 500MS/s, 5b time-interleaved SAR ADCs for UWB applications.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

Substrate noise analysis and experimental verification for the efficient noise prediction of a digital PLL.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2004
Design Considerations for Energy-Efficient Radios in Wireless Microsensor Networks.
J. VLSI Signal Process., 2004

Calibration of Rent's rule models for three-dimensional integrated circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2004

Design Considerations for Next Generation Wireless Power-Aware Microsensor Nodes.
Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004

Characterizing and modeling minimum energy operation for subthreshold circuits.
Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004

Traceback-enhanced MAP decoding algorithm.
Proceedings of the 2004 IEEE International Conference on Acoustics, 2004

Timing, energy, and thermal performance of three-dimensional integrated circuits.
Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004

Device sizing for minimum energy operation in subthreshold circuits.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

A baseband processor for pulsed ultra-wideband signals.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

Dynamic Power Management in Sensor Networks.
Proceedings of the Handbook of Sensor Networks, 2004

2003
Instruction level and operating system profiling for energy exposed software.
IEEE Trans. Very Large Scale Integr. Syst., 2003

Wiring requirement and three-dimensional integration technology for field programmable gate arrays.
IEEE Trans. Very Large Scale Integr. Syst., 2003

Energy reduction in VLSI computation modules: an information-theoretic approach.
IEEE Trans. Inf. Theory, 2003

MobiCom poster: top five myths about the energy consumption of wireless communication.
ACM SIGMOBILE Mob. Comput. Commun. Rev., 2003

Three-Dimensional Integrated Circuits: Performance, Design Methodology, and CAD Tools.
Proceedings of the 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), 2003

Energy-aware architectures for a real-valued FFT implementation.
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003

Design methodology for fine-grained leakage control in MTCMOS.
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003

Coarse acquisition for ultra wideband digital receivers.
Proceedings of the 2003 IEEE International Conference on Acoustics, 2003

Power-aware architectures and circuits for FPGA-based signal processing.
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2003

Scaling into Ambient Intelligence.
Proceedings of the 2003 Design, 2003

Design tools for 3-D integrated circuits.
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

2002
Energy-centric enabling tecumologies for wireless sensor networks.
IEEE Wirel. Commun., 2002

An application-specific protocol architecture for wireless microsensor networks.
IEEE Trans. Wirel. Commun., 2002

A bus energy model for deep submicron technology.
IEEE Trans. Very Large Scale Integr. Syst., 2002

Energy scalable system design.
IEEE Trans. Very Large Scale Integr. Syst., 2002

Power Estimation and Power Optimal Communication in Deep Submicron Buses: Analytical Models and Statistical Measures.
J. Circuits Syst. Comput., 2002

Optimal Supply and Threshold Scaling for Subthreshold CMOS Circuits.
Proceedings of the 2002 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2002), 2002

Full-chip sub-threshold leakage power prediction model for sub-0.18 µm CMOS.
Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002

A framework for energy-scalable communication in high-density wireless networks.
Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002

Maximum achievable energy reduction using coding with applications to deep sub-micron buses.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Bounding the Lifetime of Sensor Networks Via Optimal Role Assignments.
Proceedings of the Proceedings IEEE INFOCOM 2002, 2002

Subthreshold leakage modeling and reduction techniques.
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

2001
Energy-Scalable Protocols for Battery-Operated MicroSensor Networks.
J. VLSI Signal Process., 2001

Vibration-to-electric energy conversion.
IEEE Trans. Very Large Scale Integr. Syst., 2001

Quantifying and enhancing power awareness of VLSI systems.
IEEE Trans. Very Large Scale Integr. Syst., 2001

Dynamic Power Management in Wireless Sensor Networks.
IEEE Des. Test Comput., 2001

Dynamic Voltage Scheduling Using Adaptive Filtering of Workload Traces.
Proceedings of the 14th International Conference on VLSI Design (VLSI Design 2001), 2001

Low-Power Wireless Sensor Networks.
Proceedings of the 14th International Conference on VLSI Design (VLSI Design 2001), 2001

Wiring requirement and three-dimensional integration of field-programmable gate arrays.
Proceedings of the Third IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2001), March 31, 2001

Physical layer driven protocol and algorithm design for energy-efficient wireless sensor networks.
Proceedings of the MOBICOM 2001, 2001

Operating System and Algorithmic Techniques for Energy Scalable Wireless Sensor Networks.
Proceedings of the Mobile Data Management, Second International Conference, 2001

Design of a power-scalable digital least-means-square adaptive filter.
Proceedings of the Sixth International Symposium on Signal Processing and its Applications, 2001

Energy efficient Modulation and MAC for Asymmetric RF Microsensor Systems.
Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001

Analysis and implementation of charge recycling for deep sub-micron buses.
Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001

Scaling of stack effect and its application for leakage reduction.
Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001

Energy Efficient Real-Time Scheduling.
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

Upper bounds on the lifetime of sensor networks.
Proceedings of the IEEE International Conference on Communications, 2001

Energy efficient system partitioning for distributed wireless sensor networks.
Proceedings of the IEEE International Conference on Acoustics, 2001

Energy efficient protocols for low duty cycle wireless microsensor networks.
Proceedings of the IEEE International Conference on Acoustics, 2001

JouleTrack - A Web Based Tool for Software Energy Profiling.
Proceedings of the 38th Design Automation Conference, 2001

Reducing bus delay in submicron technology using coding.
Proceedings of ASP-DAC 2001, 2001

2000
High-efficiency multiple-output DC-DC conversion for low-voltage systems.
IEEE Trans. Very Large Scale Integr. Syst., 2000

Energy Aware Software.
Proceedings of the 13th International Conference on VLSI Design (VLSI Design 2000), 2000

Algorithmic transforms for efficient energy scalable computation.
Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000

OpenDesign: An Open User-Configurable Project Environment for Collaborative Design and Execution on the Internet.
Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000

Bus Energy Minimization by Transition Pattern Coding (TPC) in Deep Submicron Technologies.
Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided Design, 2000

Energy-scalable algorithms and protocols for wireless microsensor networks.
Proceedings of the IEEE International Conference on Acoustics, 2000

Energy-Efficient Communication Protocol for Wireless Microsensor Networks.
Proceedings of the 33rd Annual Hawaii International Conference on System Sciences (HICSS-33), 2000

A methodology for modeling the effects of systematic within-die interconnect and device variation on circuit performance.
Proceedings of the 37th Conference on Design Automation, 2000

An Energy Efficient Reconfigurable Public-Key Cryptograhpy Processor Architecture.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2000

1999
A low power variable length decoder for MPEG-2 based on nonuniform fine-grain table partitioning.
IEEE Trans. Very Large Scale Integr. Syst., 1999

A Low-Power Wireless Camera System.
Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999

Power scalable processing using distributed arithmetic.
Proceedings of the 1999 International Symposium on Low Power Electronics and Design, 1999

Energy efficient software through dynamic voltage scheduling.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

A Framework for Collaborative and Distributed Web-Based Design.
Proceedings of the 36th Conference on Design Automation, 1999

Design and Implementation of a Scalable Encryption Processor with Embedded Variable DC/DC Converter.
Proceedings of the 36th Conference on Design Automation, 1999

1998
A low power, low bandwidth protocol for remote wireless terminals.
Wirel. Networks, 1998

Low power scalable encryption for wireless systems.
Wirel. Networks, 1998

Special Section on Low-Power Electronics and Design.
IEEE Trans. Very Large Scale Integr. Syst., 1998

Web-based Distributed VLSI Design.
Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998

A reconfigurable dual output low power digital PWM power converter.
Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998

MTCMOS Hierarchical Sizing Based on Mutual Exclusive Discharge Patterns.
Proceedings of the 35th Conference on Design Automation, 1998

1997
Approximate Signal Processing.
J. VLSI Signal Process., 1997

Embedded power supply for low-power DSP.
IEEE Trans. Very Large Scale Integr. Syst., 1997

Network-driven motion estimation for wireless video terminals.
IEEE Trans. Circuits Syst. Video Technol., 1997

A Framework for Distributed Web-based Microsystem Design.
Proceedings of the 6th Workshop on Enabling Technologies (WET-ICE '97), 1997

Low power design without compromise (panel).
Proceedings of the 1997 International Symposium on Low Power Electronics and Design, 1997

Network driven motion estimation for portable video terminals.
Proceedings of the 1997 IEEE International Conference on Acoustics, 1997

Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT.
Proceedings of the 34st Conference on Design Automation, 1997

Transistor Sizing Issues and Tool For Multi-Threshold CMOS Technology.
Proceedings of the 34st Conference on Design Automation, 1997

1996
Guest editors' introduction.
J. VLSI Signal Process., 1996

Predictive system shutdown and other architectural techniques for energy efficient programmable computation.
IEEE Trans. Very Large Scale Integr. Syst., 1996

Multiple constant multiplications: efficient and versatile framework and algorithms for exploring common subexpression elimination.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996

Mobile Communications: Demands on VLSI Technology, Design and CAD.
Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996

Ultra low power digital signal processing.
Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996

Data driven signal processing: an approach for energy efficient computing.
Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996

A binary block matching architecture with reduced power consumption and silicon area requirement.
Proceedings of the 1996 IEEE International Conference on Acoustics, 1996

Design Considerations and Tools for Low-voltage Digital System Design.
Proceedings of the 33st Conference on Design Automation, 1996

1995
Optimizing power using transformations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

Synthesis and selection of DCT algorithms using behavioral synthesis-based algorithm space exploration.
Proceedings of the Proceedings 1995 International Conference on Image Processing, 1995

1994
Energy Efficient Programmable Computation.
Proceedings of the Seventh International Conference on VLSI Design, 1994

Research challenges in wireless multimedia.
Proceedings of the 5th IEEE International Symposium on Personal, 1994

Efficient Substitution of Multiple Constant Multiplications by Shifts and Additions Using Iterative Pairwise Matching.
Proceedings of the 31st Conference on Design Automation, 1994

1992
Low Power Techniques for Portable Real-time DSP Applications.
Proceedings of the Fifth International Conference on VLSI Design, 1992

HYPER-LP: a system for power minimization using architectural transformations.
Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992


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