Dimple Vijay Kochar

According to our database, Dimple Vijay Kochar authored at least 6 papers between 2021 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

GRPO with State Mutations: Improving LLM-Based Hardware Test Plan Generation.

Dimple Vijay Kochar, Nathaniel Ross Pinckney, Guan-Ting Liu, Chia-Tung Ho, Chenhui Deng, Haoxing Ren, Brucek Khailany

Proceedings of the 27th International Symposium on Quality Electronic Design, 2026

2025

A 0.75mm² 407μW Real-Time Speech Audio Denoiser with Quantized Cascaded Redundant Convolutional Encoder-Decoder for Wearable IoT Devices.

Dimple Vijay Kochar, Maitreyi Ashok, Anantha P. Chandrakasan

Proceedings of the 38th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems, 2025

Efficient Circuit Performance Prediction Using Machine Learning: From Schematic to Layout and Silicon Measurement with Minimal Data Input.

Dimple Vijay Kochar, Maitreyi Ashok, John Cohn, Anantha P. Chandrakasan, Xin Zhang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

2024

LEDRO: LLM-Enhanced Design Space Reduction and Optimization for Analog Circuits.

Dimple Vijay Kochar, Hanrui Wang, Anantha Chandrakasan, Xin Zhang

CoRR, 2024

2021

Estimation of Time to Failure Distribution in SRAM Due to Trapped Oxide Charges.

Dimple Vijay Kochar, Animesh Kumar

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Modeling of HKMG Stack Process Impact on Gate Leakage, SILC and PBTI.

Dimple Vijay Kochar, Tarun Samadder, Subhadeep Mukhopadhyay, Souvik Mahapatra

Proceedings of the IEEE International Reliability Physics Symposium, 2021